mirror of
https://github.com/verilator/verilator.git
synced 2025-01-05 22:27:35 +00:00
6 lines
342 B
Plaintext
6 lines
342 B
Plaintext
%Error: t/t_inst_misarray_bad.v:17:23: Illegal input port connection 'foo', mismatch between port which is an array, and expression which is not an array. (IEEE 1800-2023 7.6)
|
|
: ... note: In instance 't'
|
|
17 | .foo(foo));
|
|
| ^~~
|
|
%Error: Exiting due to
|