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38 lines
936 B
Systemverilog
38 lines
936 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Anthony Donlon.
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// SPDX-License-Identifier: CC0-1.0
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/// (See bug4551)
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/// Verilator creates an AstEnumItemRef for each reference. If the enum is inside a parameterizable class/module, it
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/// should be handled properly.
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class ClsParam #(
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int A = 0
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);
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typedef enum int {
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EN_A = A + 0,
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EN_B = A + 1,
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EN_C = A + 2
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} enums_t;
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int val = EN_C;
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function int test();
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return EN_C;
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endfunction
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endclass;
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module t;
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// localparam ENUM_VAL = ClsParam#(100)::EN_C; // TODO: Unsupported: dotted expressions in parameters
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// $info("ENUM_VAL: %0d", ENUM_VAL);
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ClsParam#(100) cls = new;
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initial begin
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if (cls.test() != 102) $stop;
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$write("*-* All Finished *-*\n");
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$finish;
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end
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endmodule
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