verilator/test_regress/t/t_assert_synth_full_vlt.out
2024-02-22 03:09:14 -05:00

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[0] -Info: t_assert_synth.v:115: top.t.test_info: Start of $info test
[0] -Info: t_assert_synth.v:116: top.t.test_info: Middle of $info test
[0] -Info: t_assert_synth.v:117: top.t.test_info: End of $info test
[40] %Error: t_assert_synth.v:40: Assertion failed in top.t: priority case, but non-match found for '2'h3'
%Error: t/t_assert_synth.v:40: Verilog $stop
Aborting...