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20 lines
471 B
Verilog
20 lines
471 B
Verilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2008 by Wilson Snyder.
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module t;
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// width warnings off due to command line
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wire A = 15'd1234;
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// width warnings off due to command line + manual switch
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// verilator lint_off WIDTH
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wire B = 15'd1234;
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// this turnon does nothing as off on command line
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// verilator lint_on WIDTH
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wire C = 15'd1234;
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endmodule
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