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40 lines
1.1 KiB
Python
Executable File
40 lines
1.1 KiB
Python
Executable File
#!/usr/bin/env python3
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# DESCRIPTION: Verilator: Verilog Test driver/expect definition
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#
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# Copyright 2024 by Wilson Snyder. This program is free software; you
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# can redistribute it and/or modify it under the terms of either the GNU
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# Lesser General Public License Version 3 or the Perl Artistic License
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# Version 2.0.
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# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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import vltest_bootstrap
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test.scenarios('vlt')
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test.top_filename = "t/t_var_pinsizes.v"
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test.compile(verilator_flags2=['-cc'],
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verilator_make_gmake=False,
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make_top_shell=False,
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make_main=False)
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def hgrep(re):
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test.file_grep(os.path.join(test.obj_dir, test.vm_prefix + ".h"), re)
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hgrep(r'VL_IN8\(&i1,0,0\);')
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hgrep(r'VL_IN8\(&i8,7,0\);')
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hgrep(r'VL_IN16\(&i16,15,0\);')
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hgrep(r'VL_IN\(&i32,31,0\);')
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hgrep(r'VL_IN64\(&i64,63,0\);')
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hgrep(r'VL_INW\(&i65,64,0,3\);')
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hgrep(r'VL_OUT8\(&o1,0,0\);')
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hgrep(r'VL_OUT8\(&o8,7,0\);')
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hgrep(r'VL_OUT16\(&o16,15,0\);')
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hgrep(r'VL_OUT\(&o32,31,0\);')
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hgrep(r'VL_OUT64\(&o64,63,0\);')
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hgrep(r'VL_OUTW\(&o65,64,0,3\);')
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test.passes()
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