verilator/test_regress/t/t_bench_synmul.pl

27 lines
659 B
Perl
Executable File

#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
top_filename("t/t_math_synmul.v");
my $cycles = $Self->{benchmark}||0;
$cycles = 100 if $cycles<100;
$Self->{sim_time} = $cycles*100;
compile (
v_flags2 => ["+define+SIM_CYCLES=${cycles}"],
);
execute (
check_finished=>1,
);
ok(1);
1;