mirror of
https://github.com/verilator/verilator.git
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462 lines
17 KiB
C++
462 lines
17 KiB
C++
// -*- mode: C++; c-file-style: "cc-mode" -*-
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//*************************************************************************
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// DESCRIPTION: Verilator: Add temporaries, such as for inline nodes
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//
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// Code available from: http://www.veripool.org/verilator
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//
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//*************************************************************************
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//
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// Copyright 2003-2012 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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//
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// Verilator is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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//*************************************************************************
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// V3Inline's Transformations:
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//
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// Each module:
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// Look for CELL... PRAGMA INLINE_MODULE
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// Replicate the cell's module
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// Convert pins to wires that make assignments
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// Rename vars to include cell name
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// Insert cell's module statements into the upper module
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//
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//*************************************************************************
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#include "config_build.h"
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#include "verilatedos.h"
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#include <cstdio>
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#include <cstdarg>
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#include <unistd.h>
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#include <algorithm>
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#include <vector>
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#include "V3Global.h"
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#include "V3Inline.h"
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#include "V3Inst.h"
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#include "V3Stats.h"
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#include "V3Ast.h"
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//######################################################################
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// Inline state, as a visitor of each AstNode
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// CONFIG
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static const int INLINE_MODS_SMALLER = 100; // If a mod is < this # nodes, can always inline it
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class InlineVisitor : public AstNVisitor {
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private:
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// NODE STATE
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// Cleared entire netlist
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// Input:
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// AstNodeModule::user1p() // bool. True to inline this module (from InlineMarkVisitor)
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// Cleared each cell
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// AstVar::user2p() // AstVarRef*/AstConst* Points to signal this is a direct connect to
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// AstVar::user3() // bool Don't alias the user4, keep it as signal
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// STATE
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AstNodeModule* m_modp; // Current module
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AstCell* m_cellp; // Cell being cloned
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V3Double0 m_statCells; // Statistic tracking
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static int debug() {
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static int level = -1;
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if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
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return level;
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}
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// VISITORS
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virtual void visit(AstNetlist* nodep, AstNUser*) {
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// Iterate modules backwards, in bottom-up order. Required!
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nodep->iterateChildrenBackwards(*this);
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}
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virtual void visit(AstNodeModule* nodep, AstNUser*) {
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if (m_cellp) {
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} else {
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m_modp = nodep;
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}
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nodep->iterateChildren(*this);
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}
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virtual void visit(AstCellInline* nodep, AstNUser*) {
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// Inlined cell under the inline cell, need to move to avoid conflicts
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if (m_cellp) {
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nodep->unlinkFrBack();
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m_modp->addInlinesp(nodep);
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// Rename
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string name = m_cellp->name() + "__DOT__" + nodep->name();
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nodep->name(name);
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UINFO(6, " Inline "<<nodep<<endl);
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// Do CellInlines under this, but don't move them
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nodep->iterateChildren(*this);
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}
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}
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virtual void visit(AstCell* nodep, AstNUser*) {
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if (m_cellp) {
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// Cell under the inline cell, need to rename to avoid conflicts
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string name = m_cellp->name() + "__DOT__" + nodep->name();
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nodep->name(name);
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nodep->iterateChildren(*this);
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}
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if (nodep->modp()->user1()) { // Marked with inline request
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if (m_cellp) nodep->v3error("Cloning should have already been done bottom-up");
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UINFO(5," Inline CELL "<<nodep<<endl);
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UINFO(5," To MOD "<<m_modp<<endl);
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++m_statCells;
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// Before cloning simplify pin assignments
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// Better off before, as if module has multiple instantiations
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// we'll save work, and we can't call pinReconnectSimple in
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// this loop as it clone()s itself.
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) {
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if (!pinp->exprp()) continue;
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V3Inst::pinReconnectSimple(pinp, nodep, m_modp, false);
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}
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// Clone original module
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if (debug()>=9) { nodep->dumpTree(cout,"inlcell:"); }
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//if (debug()>=9) { nodep->modp()->dumpTree(cout,"oldmod:"); }
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AstNodeModule* newmodp = nodep->modp()->cloneTree(false);
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if (debug()>=9) { newmodp->dumpTree(cout,"newmod:"); }
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// Clear var markings
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AstNode::user2ClearTree();
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// Create data for dotted variable resolution
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AstCellInline* inlinep = new AstCellInline(nodep->fileline(),
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nodep->name(), nodep->modp()->origName());
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m_modp->addInlinesp(inlinep); // Must be parsed before any AstCells
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// Create assignments to the pins
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) {
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if (!pinp->exprp()) continue;
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UINFO(6," Pin change from "<<pinp->modVarp()<<endl);
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// Make new signal; even though we'll optimize the interconnect, we
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// need an alias to trace correctly. If tracing is disabled, we'll
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// delete it in later optimizations.
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AstVar* pinOldVarp = pinp->modVarp();
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AstVar* pinNewVarp = pinOldVarp->clonep()->castVar();
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AstNode* connectRefp = pinp->exprp();
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if (!connectRefp->castConst() && !connectRefp->castVarRef()) {
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pinp->v3fatalSrc("Unknown interconnect type; pinReconnectSimple should have cleared up\n");
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}
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if (pinNewVarp->isOutOnly() && connectRefp->castConst()) {
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pinp->v3error("Output port is connected to a constant pin, electrical short");
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}
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// Propagate any attributes across the interconnect
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pinNewVarp->propagateAttrFrom(pinOldVarp);
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if (connectRefp->castVarRef()) {
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connectRefp->castVarRef()->varp()->propagateAttrFrom(pinOldVarp);
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}
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// One to one interconnect won't make a temporary variable.
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// This prevents creating a lot of extra wires for clock signals.
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// It will become a tracing alias.
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UINFO(6,"One-to-one "<<connectRefp<<endl);
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UINFO(6," -to "<<pinNewVarp<<endl);
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pinNewVarp->user2p(connectRefp);
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// Public output inside the cell must go via an assign rather than alias
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// Else the public logic will set the alias, loosing the value to be propagated up
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// (InOnly isn't a problem as the AssignAlias will create the assignment for us)
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pinNewVarp->user3(pinNewVarp->isSigUserRWPublic() && pinNewVarp->isOutOnly());
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}
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// Cleanup var names, etc, to not conflict
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m_cellp = nodep;
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newmodp->iterate(*this); // Not iterateAndNext because newmodp isn't linked; no back
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m_cellp = NULL;
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// Move statements to top module
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if (debug()>=9) { newmodp->dumpTree(cout,"fixmod:"); }
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AstNode* stmtsp = newmodp->stmtsp();
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if (stmtsp) stmtsp->unlinkFrBackWithNext();
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if (stmtsp) m_modp->addStmtp(stmtsp);
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// Remove the cell
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newmodp->deleteTree(); newmodp=NULL; // Clear any leftover ports, etc
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nodep->unlinkFrBack();
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pushDeletep(nodep); nodep = NULL;
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if (debug()>=9) { m_modp->dumpTree(cout,"donemod:"); }
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}
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}
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virtual void visit(AstVar* nodep, AstNUser*) {
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if (m_cellp) {
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if (nodep->user2p()) {
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// Make an assignment, so we'll trace it properly
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// user2p is either a const or a var.
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AstConst* exprconstp = nodep->user2p()->castNode()->castConst();
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AstVarRef* exprvarrefp = nodep->user2p()->castNode()->castVarRef();
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UINFO(8,"connectto: "<<nodep->user2p()->castNode()<<endl);
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if (!exprconstp && !exprvarrefp) {
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nodep->v3fatalSrc("Unknown interconnect type; pinReconnectSimple should have cleared up\n");
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}
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if (exprconstp) {
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m_modp->addStmtp(new AstAssignW(nodep->fileline(),
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new AstVarRef(nodep->fileline(), nodep, true),
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exprconstp->cloneTree(true)));
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} else if (nodep->user3()) {
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// Public variable at the lower module end - we need to make sure we propagate
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// the logic changes up and down; if we aliased, we might remove the change detection
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// on the output variable.
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UINFO(9,"public pin assign: "<<exprvarrefp<<endl);
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if (nodep->isInput()) nodep->v3fatalSrc("Outputs only - inputs use AssignAlias");
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m_modp->addStmtp(new AstAssignW(nodep->fileline(),
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new AstVarRef(nodep->fileline(), exprvarrefp->varp(), true),
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new AstVarRef(nodep->fileline(), nodep, false)));
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} else {
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m_modp->addStmtp(new AstAssignAlias(nodep->fileline(),
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new AstVarRef(nodep->fileline(), nodep, true),
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new AstVarRef(nodep->fileline(), exprvarrefp->varp(), false)));
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AstNode* nodebp=exprvarrefp->varp();
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nodep ->fileline()->modifyStateInherit(nodebp->fileline());
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nodebp->fileline()->modifyStateInherit(nodep ->fileline());
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}
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}
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// Variable under the inline cell, need to rename to avoid conflicts
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// Also clear I/O bits, as it is now local.
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string name = m_cellp->name() + "__DOT__" + nodep->name();
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if (!nodep->isFuncLocal()) nodep->inlineAttrReset(name);
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if (debug()>=9) { nodep->dumpTree(cout,"varchanged:"); }
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if (debug()>=9) { nodep->valuep()->dumpTree(cout,"varchangei:"); }
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}
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if (nodep) nodep->iterateChildren(*this);
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}
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virtual void visit(AstNodeFTask* nodep, AstNUser*) {
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if (m_cellp) {
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// Function under the inline cell, need to rename to avoid conflicts
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nodep->name(m_cellp->name() + "__DOT__" + nodep->name());
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}
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nodep->iterateChildren(*this);
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}
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virtual void visit(AstTypedef* nodep, AstNUser*) {
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if (m_cellp) {
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// Typedef under the inline cell, need to rename to avoid conflicts
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nodep->name(m_cellp->name() + "__DOT__" + nodep->name());
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}
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nodep->iterateChildren(*this);
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}
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virtual void visit(AstVarRef* nodep, AstNUser*) {
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if (m_cellp) {
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if (nodep->varp()->user2p() // It's being converted to an alias.
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&& !nodep->varp()->user3()
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&& !nodep->backp()->castAssignAlias()) { // Don't constant propagate aliases (we just made)
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AstConst* exprconstp = nodep->varp()->user2p()->castNode()->castConst();
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AstVarRef* exprvarrefp = nodep->varp()->user2p()->castNode()->castVarRef();
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if (exprconstp) {
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nodep->replaceWith(exprconstp->cloneTree(true));
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nodep->deleteTree(); nodep=NULL;
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return;
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}
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else if (exprvarrefp) {
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nodep->varp( exprvarrefp->varp() );
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}
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else {
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nodep->v3fatalSrc("Null connection?\n");
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}
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}
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nodep->name(nodep->varp()->name());
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}
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nodep->iterateChildren(*this);
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}
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virtual void visit(AstVarXRef* nodep, AstNUser*) {
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if (m_cellp) {
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// Track what scope it was originally under so V3LinkDot can resolve it
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string newname = m_cellp->name();
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if (nodep->inlinedDots() != "") { newname += "." + nodep->inlinedDots(); }
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nodep->inlinedDots(newname);
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UINFO(8," "<<nodep<<endl);
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}
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nodep->iterateChildren(*this);
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}
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virtual void visit(AstNodeFTaskRef* nodep, AstNUser*) {
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if (m_cellp) {
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// Track what scope it was originally under so V3LinkDot can resolve it
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string newname = m_cellp->name();
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if (nodep->inlinedDots() != "") { newname += "." + nodep->inlinedDots(); }
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nodep->inlinedDots(newname);
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UINFO(8," "<<nodep<<endl);
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}
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nodep->iterateChildren(*this);
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}
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// Not needed, as V3LinkDot doesn't care about typedefs
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//virtual void visit(AstRefDType* nodep, AstNUser*) {}
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virtual void visit(AstScopeName* nodep, AstNUser*) {
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// If there's a %m in the display text, we add a special node that will contain the name()
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// Similar code in V3Begin
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if (m_cellp) {
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// To keep correct visual order, must add before other Text's
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AstNode* afterp = nodep->scopeAttrp();
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if (afterp) afterp->unlinkFrBackWithNext();
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nodep->scopeAttrp(new AstText(nodep->fileline(), (string)"__DOT__"+m_cellp->name()));
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if (afterp) nodep->scopeAttrp(afterp);
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}
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nodep->iterateChildren(*this);
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}
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virtual void visit(AstCoverDecl* nodep, AstNUser*) {
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// Fix path in coverage statements
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if (m_cellp) {
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nodep->hier(m_cellp->prettyName()
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+ (nodep->hier()!="" ? ".":"")
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+ nodep->hier());
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}
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nodep->iterateChildren(*this);
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}
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//--------------------
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// Default: Just iterate
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virtual void visit(AstNode* nodep, AstNUser*) {
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nodep->iterateChildren(*this);
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}
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public:
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// CONSTUCTORS
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InlineVisitor(AstNode* nodep) {
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m_cellp = NULL;
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m_modp = NULL;
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nodep->accept(*this);
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}
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virtual ~InlineVisitor() {
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V3Stats::addStat("Optimizations, Inlined cells", m_statCells);
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}
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};
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//######################################################################
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// Inline state, as a visitor of each AstNode
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class InlineMarkVisitor : public AstNVisitor {
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private:
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// NODE STATE
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// Entire netlist
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// AstNodeModule::user1() // OUTPUT: bool. User request to inline this module
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// AstNodeModule::user2() // bool. Allowed to automatically inline module
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// AstNodeModule::user3() // int. Number of cells referencing this module
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AstUser1InUse m_inuser1;
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AstUser2InUse m_inuser2;
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AstUser3InUse m_inuser3;
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// STATE
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AstNodeModule* m_modp; // Current module
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int m_stmtCnt; // Statements in module
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// METHODS
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void cantInline(const char* reason) {
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if (m_modp->user2()) {
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UINFO(4," No inline: "<<reason<<" "<<m_modp<<endl);
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m_modp->user2(false);
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}
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}
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// VISITORS
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virtual void visit(AstNodeModule* nodep, AstNUser*) {
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m_stmtCnt = 0;
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m_modp = nodep;
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m_modp->user2(true); // Allowed = true
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if (m_modp->modPublic()) cantInline("modPublic");
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//
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nodep->iterateChildren(*this);
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//
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bool userinline = nodep->user1();
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bool allowed = nodep->user2();
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int refs = nodep->user3();
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// Should we automatically inline this module?
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// inlineMult = 2000 by default. If a mod*#instances is < this # nodes, can inline it
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bool doit = (userinline || (allowed && (refs==1
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|| m_stmtCnt < INLINE_MODS_SMALLER
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|| v3Global.opt.inlineMult() < 1
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|| refs*m_stmtCnt < v3Global.opt.inlineMult())));
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// Packages aren't really "under" anything so they confuse this algorithm
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if (nodep->castPackage()) doit = false;
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UINFO(4, " Inline="<<doit<<" Possible="<<allowed<<" Usr="<<userinline<<" Refs="<<refs<<" Stmts="<<m_stmtCnt
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<<" "<<nodep<<endl);
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if (doit) {
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UINFO(4," AutoInline "<<nodep<<endl);
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nodep->user1(true);
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}
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m_modp = NULL;
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}
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virtual void visit(AstCell* nodep, AstNUser*) {
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nodep->modp()->user3Inc();
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nodep->iterateChildren(*this);
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}
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virtual void visit(AstPragma* nodep, AstNUser*) {
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if (nodep->pragType() == AstPragmaType::INLINE_MODULE) {
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//UINFO(0,"PRAG MARK "<<m_modp<<endl);
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if (!m_modp) {
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nodep->v3error("Inline pragma not under a module");
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} else {
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m_modp->user1(1);
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}
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nodep->unlinkFrBack()->deleteTree(); nodep=NULL; // Remove so don't propagate to upper cell...
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} else if (nodep->pragType() == AstPragmaType::NO_INLINE_MODULE) {
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if (!m_modp) {
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nodep->v3error("Inline pragma not under a module");
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} else {
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cantInline("Pragma NO_INLINE_MODULE");
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}
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nodep->unlinkFrBack()->deleteTree(); nodep=NULL; // Remove so don't propagate to upper cell...
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} else {
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nodep->iterateChildren(*this);
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}
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}
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virtual void visit(AstVarXRef* nodep, AstNUser*) {
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// Cleanup link until V3LinkDot can correct it
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nodep->varp(NULL);
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}
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virtual void visit(AstNodeFTaskRef* nodep, AstNUser*) {
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// Cleanup link until V3LinkDot can correct it
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if (!nodep->packagep()) nodep->taskp(NULL);
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nodep->iterateChildren(*this);
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}
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// Nop's to speed up the loop
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virtual void visit(AstAlways* nodep, AstNUser*) {
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nodep->iterateChildren(*this);
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m_stmtCnt++;
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}
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virtual void visit(AstNodeAssign* nodep, AstNUser*) {
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// Don't count assignments, as they'll likely flatten out
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// Still need to iterate though to nullify VarXRefs
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int oldcnt = m_stmtCnt;
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nodep->iterateChildren(*this);
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m_stmtCnt = oldcnt;
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}
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//--------------------
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// Default: Just iterate
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virtual void visit(AstNode* nodep, AstNUser*) {
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nodep->iterateChildren(*this);
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m_stmtCnt++;
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}
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public:
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// CONSTUCTORS
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InlineMarkVisitor(AstNode* nodep) {
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m_modp = NULL;
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m_stmtCnt = 0;
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//VV***** We reset all userp() on the whole netlist!!!
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AstNode::user1ClearTree();
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AstNode::user2ClearTree();
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AstNode::user3ClearTree();
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nodep->accept(*this);
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}
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virtual ~InlineMarkVisitor() {}
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};
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//######################################################################
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// Inline class functions
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void V3Inline::inlineAll(AstNetlist* nodep) {
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UINFO(2,__FUNCTION__<<": "<<endl);
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InlineMarkVisitor mvisitor (nodep);
|
||
InlineVisitor visitor (nodep);
|
||
// Remove all modules that were inlined
|
||
// V3Dead will also clean them up, but if we have debug on, it's a good
|
||
// idea to avoid dumping the hugely exploded tree.
|
||
AstNodeModule* nextmodp;
|
||
for (AstNodeModule* modp = v3Global.rootp()->modulesp(); modp; modp=nextmodp) {
|
||
nextmodp = modp->nextp()->castNodeModule();
|
||
if (modp->user1()) { // Was inlined
|
||
modp->unlinkFrBack()->deleteTree(); modp=NULL;
|
||
}
|
||
}
|
||
}
|