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https://github.com/verilator/verilator.git
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291 lines
10 KiB
C++
291 lines
10 KiB
C++
//*************************************************************************
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// DESCRIPTION: Verilator: Resolve module/signal name references
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//
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// Code available from: http://www.veripool.org/verilator
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//
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// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
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//
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//*************************************************************************
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//
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// Copyright 2003-2010 by Wilson Snyder. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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//
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// Verilator is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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//*************************************************************************
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// NO EDITS: Don't replace or delete nodes, as the parser symbol table
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// has pointers into the ast tree.
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//
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// LINK TRANSFORMATIONS:
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// Top-down traversal
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// Cells:
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// Read module if needed
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// Link to module that instantiates it
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//*************************************************************************
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#include "config_build.h"
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#include "verilatedos.h"
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#include <cstdio>
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#include <cstdarg>
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#include <unistd.h>
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#include <map>
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#include <algorithm>
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#include <vector>
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#include "V3Global.h"
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#include "V3LinkCells.h"
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#include "V3SymTable.h"
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#include "V3Parse.h"
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#include "V3Ast.h"
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#include "V3Graph.h"
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//######################################################################
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// Graph subclasses
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class LinkCellsGraph : public V3Graph {
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public:
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LinkCellsGraph() {}
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virtual ~LinkCellsGraph() {}
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virtual void loopsMessageCb(V3GraphVertex* vertexp);
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};
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class LinkCellsVertex : public V3GraphVertex {
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AstNodeModule* m_modp;
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public:
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LinkCellsVertex(V3Graph* graphp, AstNodeModule* modp)
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: V3GraphVertex(graphp), m_modp(modp) {}
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virtual ~LinkCellsVertex() {}
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AstNodeModule* modp() const { return m_modp; }
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virtual string name() const { return modp()->name(); }
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};
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class LibraryVertex : public V3GraphVertex {
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public:
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LibraryVertex(V3Graph* graphp)
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: V3GraphVertex(graphp) {}
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virtual ~LibraryVertex() {}
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virtual string name() const { return "*LIBRARY*"; }
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};
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void LinkCellsGraph::loopsMessageCb(V3GraphVertex* vertexp) {
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if (LinkCellsVertex* vvertexp = dynamic_cast<LinkCellsVertex*>(vertexp)) {
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vvertexp->modp()->v3error("Recursive module (module instantiates itself): "
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<<vvertexp->modp()->name());
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V3Error::abortIfErrors();
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} else { // Everything should match above, but...
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v3fatalSrc("Recursive instantiations");
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}
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}
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//######################################################################
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// Link state, as a visitor of each AstNode
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class LinkCellsVisitor : public AstNVisitor {
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private:
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// NODE STATE
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// Entire netlist:
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// AstNodeModule::user1p() // V3GraphVertex* Vertex describing this module
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// Allocated across all readFiles in V3Global::readFiles:
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// AstNode::user4p() // V3SymTable* Package and typedef symbol names
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AstUser1InUse m_inuser1;
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// STATE
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V3InFilter* m_filterp; // Parser filter
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// Below state needs to be preserved between each module call.
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AstNodeModule* m_modp; // Current module
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V3SymTable m_mods; // Symbol table of all module names
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LinkCellsGraph m_graph; // Linked graph of all cell interconnects
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LibraryVertex* m_libVertexp; // Vertex at root of all libraries
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V3GraphVertex* m_topVertexp; // Vertex of top module
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static int debug() {
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static int level = -1;
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if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
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return level;
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}
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// METHODS
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V3GraphVertex* vertex(AstNodeModule* nodep) {
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// Return corresponding vertex for this module
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if (!nodep->user1p()) {
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nodep->user1p(new LinkCellsVertex(&m_graph, nodep));
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}
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return (nodep->user1p()->castGraphVertex());
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}
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// VISITs
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virtual void visit(AstNetlist* nodep, AstNUser*) {
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AstNode::user1ClearTree();
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readModNames();
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nodep->iterateChildren(*this);
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// Find levels in graph
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m_graph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
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m_graph.dumpDotFilePrefixed("linkcells");
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m_graph.rank();
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for (V3GraphVertex* itp = m_graph.verticesBeginp(); itp; itp=itp->verticesNextp()) {
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if (LinkCellsVertex* vvertexp = dynamic_cast<LinkCellsVertex*>(itp)) {
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// +1 so we leave level 1 for the new wrapper we'll make in a moment
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AstNodeModule* modp = vvertexp->modp();
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modp->level(vvertexp->rank()+1);
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if (vvertexp == m_topVertexp && modp->level() != 2) {
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v3error("Specified --top-module '"<<v3Global.opt.topModule()<<"' isn't at the top level, it's under another cell.");
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}
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}
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}
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if (v3Global.opt.topModule()!=""
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&& !m_topVertexp) {
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v3error("Specified --top-module '"<<v3Global.opt.topModule()<<"' was not found in design.");
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}
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}
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virtual void visit(AstNodeModule* nodep, AstNUser*) {
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// Module: Pick up modnames, so we can resolve cells later
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m_modp = nodep;
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UINFO(2,"Link Module: "<<nodep<<endl);
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bool topMatch = (v3Global.opt.topModule()==nodep->name());
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if (topMatch) {
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m_topVertexp = vertex(nodep);
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UINFO(2,"Link --top-module: "<<nodep<<endl);
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nodep->inLibrary(false); // Safer to make sure it doesn't disappear
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}
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if (v3Global.opt.topModule()==""
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? nodep->inLibrary() // Library cells are lower
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: !topMatch) { // Any non-specified module is lower
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// Put under a fake vertex so that the graph ranking won't indicate
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// this is a top level module
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if (!m_libVertexp) m_libVertexp = new LibraryVertex(&m_graph);
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new V3GraphEdge(&m_graph, m_libVertexp, vertex(nodep), 1, false);
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}
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nodep->iterateChildren(*this);
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nodep->checkTree();
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m_modp = NULL;
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}
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virtual void visit(AstCell* nodep, AstNUser*) {
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// Cell: Resolve its filename. If necessary, parse it.
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if (!nodep->modp()) {
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UINFO(4,"Link Cell: "<<nodep<<endl);
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// Use findIdUpward instead of findIdFlat; it doesn't matter for now
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// but we might support modules-under-modules someday.
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AstNodeModule* modp = m_mods.findIdUpward(nodep->modName())->castNodeModule();
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if (!modp) {
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// Read-subfile
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V3Parse parser (v3Global.rootp(), m_filterp);
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parser.parseFile(nodep->fileline(), nodep->modName(), false);
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V3Error::abortIfErrors();
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// We've read new modules, grab new pointers to their names
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readModNames();
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// Check again
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modp = m_mods.findIdUpward(nodep->modName())->castNodeModule();
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if (!modp) {
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nodep->v3error("Can't resolve module reference: "<<nodep->modName());
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}
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}
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if (modp) {
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nodep->modp(modp);
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// Track module depths, so can sort list from parent down to children
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new V3GraphEdge(&m_graph, vertex(m_modp), vertex(modp), 1, false);
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}
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}
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// Convert .* to list of pins
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bool pinStar = false;
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for (AstPin* nextp, *pinp = nodep->pinsp(); pinp; pinp=nextp) {
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nextp = pinp->nextp()->castPin();
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if (pinp->dotStar()) {
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if (pinStar) pinp->v3error("Duplicate .* in a cell");
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pinStar = true;
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// Done with this fake pin
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pinp->unlinkFrBack()->deleteTree(); pinp=NULL;
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}
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}
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if (nodep->modp() && pinStar) {
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// Note what pins exist
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UINFO(9," CELL .* connect "<<nodep<<endl);
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V3SymTable ports; // Symbol table of all connected port names
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) {
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if (pinp->name()=="") pinp->v3error("Connect by position is illegal in .* connected cells");
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if (!ports.findIdFlat(pinp->name())) {
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ports.insert(pinp->name(), pinp);
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}
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}
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// We search ports, rather than in/out declarations as they aren't resolved yet,
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// and it's easier to do it now than in V3Link when we'd need to repeat steps.
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for (AstNode* portnodep = nodep->modp()->stmtsp(); portnodep; portnodep=portnodep->nextp()) {
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if (AstPort* portp = portnodep->castPort()) {
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if (!ports.findIdFlat(portp->name())) {
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UINFO(9," need PORT "<<portp<<endl);
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// Create any not already connected
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AstPin* newp = new AstPin(nodep->fileline(),0,portp->name(),
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new AstVarRef(nodep->fileline(),portp->name(),false));
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newp->svImplicit(true);
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nodep->addPinsp(newp);
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}
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}
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}
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}
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// Convert unnamed pins to pin number based assignments
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for (AstPin* pinp = nodep->pinsp(); pinp; pinp=pinp->nextp()->castPin()) {
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if (pinp->name()=="") pinp->name("__pinNumber"+cvtToStr(pinp->pinNum()));
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}
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for (AstPin* pinp = nodep->paramsp(); pinp; pinp=pinp->nextp()->castPin()) {
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if (pinp->name()=="") pinp->name("__paramNumber"+cvtToStr(pinp->pinNum()));
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}
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if (nodep->modp()) {
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nodep->iterateChildren(*this);
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}
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}
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// Accelerate the recursion
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// Must do statements to support Generates, math though...
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virtual void visit(AstNodeMath* nodep, AstNUser*) {}
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virtual void visit(AstNode* nodep, AstNUser*) {
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// Default: Just iterate
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nodep->iterateChildren(*this);
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}
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// METHODS
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void readModNames() {
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// Look at all modules, and store pointers to all module names
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for (AstNodeModule* nextp,* nodep = v3Global.rootp()->modulesp(); nodep; nodep=nextp) {
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nextp = nodep->nextp()->castNodeModule();
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AstNode* foundp = m_mods.findIdUpward(nodep->name());
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if (foundp && foundp != nodep) {
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if (!(foundp->fileline()->warnIsOff(V3ErrorCode::MODDUP) || nodep->fileline()->warnIsOff(V3ErrorCode::MODDUP))) {
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nodep->v3warn(MODDUP,"Duplicate declaration of module: "<<nodep->prettyName());
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foundp->v3warn(MODDUP,"... Location of original declaration");
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}
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nodep->unlinkFrBack();
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pushDeletep(nodep); nodep=NULL;
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} else if (!foundp) {
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m_mods.insert(nodep->name(), nodep);
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}
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}
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//if (debug()>=9) m_mods.dump(cout, "-syms: ");
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}
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public:
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// CONSTUCTORS
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LinkCellsVisitor(AstNetlist* rootp, V3InFilter* filterp) {
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m_filterp = filterp;
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m_modp = NULL;
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m_libVertexp = NULL;
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m_topVertexp = NULL;
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rootp->accept(*this);
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}
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virtual ~LinkCellsVisitor() {}
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};
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//######################################################################
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// Link class functions
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void V3LinkCells::link(AstNetlist* rootp, V3InFilter* filterp) {
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UINFO(4,__FUNCTION__<<": "<<endl);
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LinkCellsVisitor visitor (rootp, filterp);
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}
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