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608d5a87d1
verilator/examples/make_tracing_sc
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Wilson Snyder 608d5a87d1 tests: Avoid assuming a timescale.
2020-04-07 20:55:47 -04:00
..
.gitignore Rename examples in prep for CMake. 2019-10-06 10:32:49 -04:00
input.vc Rename examples in prep for CMake. 2019-10-06 10:32:49 -04:00
Makefile Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
Makefile_obj Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
sc_main.cpp tests: Avoid assuming a timescale. 2020-04-07 20:55:47 -04:00
sub.v Add SPDX license identifiers. No functional change. 2020-03-21 11:24:24 -04:00
top.v Tests: Standardize verilog indentation. 2020-04-05 21:53:24 -04:00