verilator/test_regress/t/t_vpi_get.pl
Lukasz Dalek d6ac351dcb Add --public-flat-rw switch, bug1511.
This switch exposes VARs, PORTs and WIREs to C++ code. It must be use
with care as it has a significant performance impact and may result in
mis-simulation of generated clocks. Anyhow, it is prefered over
--public and useful for VPI.

Signed-off-by: Lukasz Dalek <ldalek@antmicro.com>
Signed-off-by: Stefan Wallentowitz <stefan@wallentowitz.de>
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
2019-09-23 07:56:07 -04:00

31 lines
877 B
Perl
Executable File

#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2010 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
scenarios(simulator => 1);
skip("Known compiler limitation")
if $Self->cxx_version =~ /\(GCC\) 4.4/;
compile(
make_top_shell => 0,
make_main => 0,
verilator_flags2 => ["-CFLAGS '-DVL_DEBUG -ggdb' --exe --vpi --no-l2name $Self->{t_dir}/t_vpi_get.cpp"],
make_pli => 1,
iv_flags2 => ["-g2005-sv -D USE_VPI_NOT_DPI"],
v_flags2 => ["+define+USE_VPI_NOT_DPI +define+VERILATOR_COMMENTS"],
);
execute(
iv_pli => 1,
check_finished => 1
);
ok(1);
1;