verilator/test_regress
Geza Lore 3069860fdf Allow mismatched widths in operands of shifts in DFG
Fixes #3872.

Testing this is a bit tricky, as the front-end fixes up the operand
widths in shifts to match, and we need V3Const to introduce a mismatched
one by reducing `4'd2 ** x` (with x being 2 2-bit wide signal) to `4'd1
<< x`, but t_dfg_peephole runs with V3Const disabled exactly because it
makes it hard to write tests. Rather than fixing this one case in
V3Const (which we should do systematically at some point), I fixed DFG
to accept these just in case V3Const generates more of them. The
assertions were there only because of paranoia (as I thought these were
not possible inputs), the code otherwise works.
2023-01-22 10:55:03 +00:00
..
t Allow mismatched widths in operands of shifts in DFG 2023-01-22 10:55:03 +00:00
.gdbinit
.gitignore
CMakeLists.txt
driver.pl Move test driver documentation into internals.rst 2023-01-21 16:17:26 -05:00
input.vc
input.xsim.vc
Makefile
Makefile_obj