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decfa6bd7a
This helps diffing generated code after reordering output, otherwise no functional change.
25 lines
1.0 KiB
Plaintext
25 lines
1.0 KiB
Plaintext
-V{t#,#}- Verilated::debug is on. Message prefix indicates {<thread>,<sequence_number>}.
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-V{t#,#}+ Vt_verilated_debug___024root___ctor_var_reset
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internalsDump:
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Version: Verilator ###
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Argv: obj_vlt/t_verilated_debug/Vt_verilated_debug
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scopesDump:
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-V{t#,#}+++++TOP Evaluate Vt_verilated_debug::eval_step
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-V{t#,#}+ Vt_verilated_debug___024root___eval_debug_assertions
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-V{t#,#}+ Vt_verilated_debug___024root___eval_initial
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-V{t#,#}+ Vt_verilated_debug___024root___initial__TOP__0
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Data: w96: 000000aa 000000bb 000000cc
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-V{t#,#}+ Initial loop
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-V{t#,#}+ Vt_verilated_debug___024root___eval_settle
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-V{t#,#}+ Vt_verilated_debug___024root___eval
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-V{t#,#}+ Clock loop
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-V{t#,#}+ Vt_verilated_debug___024root___eval
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-V{t#,#}+++++TOP Evaluate Vt_verilated_debug::eval_step
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-V{t#,#}+ Vt_verilated_debug___024root___eval_debug_assertions
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-V{t#,#}+ Clock loop
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-V{t#,#}+ Vt_verilated_debug___024root___eval
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-V{t#,#}+ Vt_verilated_debug___024root___sequent__TOP__0
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*-* All Finished *-*
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-V{t#,#}+ Vt_verilated_debug___024root___final
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