verilator/test_regress/t/t_trace_event.out

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$version Generated by VerilatedVcd $end
$timescale 1ps $end
$scope module $rootio $end
$upscope $end
$scope module t $end
$var event 1 # ev_test $end
$var wire 32 $ i [31:0] $end
$var wire 1 % toggle $end
$var wire 1 & clk $end
$upscope $end
$enddefinitions $end
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