mirror of
https://github.com/verilator/verilator.git
synced 2025-01-09 16:17:36 +00:00
12 lines
380 B
Plaintext
12 lines
380 B
Plaintext
// DESCRIPTION: Verilator: Verilog Test module
|
|
//
|
|
// This file ONLY is placed into the Public Domain, for any use,
|
|
// without warranty, 2019 by Stefan Wallentowitz.
|
|
// SPDX-License-Identifier: CC0-1.0
|
|
|
|
`verilator_config
|
|
|
|
coverage_block_off -file "t/t_cover_line.v" -lines 137
|
|
coverage_block_off -file "t/t_cover_line.v" -lines 171
|
|
coverage_block_off -module "beta" -block "block"
|