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32 lines
840 B
Systemverilog
32 lines
840 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// Copyright 2024 by Antmicro. This program is free software; you can
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// redistribute it and/or modify it under the terms of either the GNU
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// Lesser General Public License Version 3 or the Perl Artistic License
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// Version 2.0.
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// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
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module t (/*AUTOARG*/);
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int a = 123;
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int b = 321;
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int out;
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import "DPI-C" function void dpii_add
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(int a, int b, ref int out);
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import "DPI-C" function int dpii_add_check
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(int actual, int expected);
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initial begin
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dpii_add(a, b, out);
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if (dpii_add_check(out, (a + b)) != 1) begin
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$write("%%Error: Failure in DPI tests\n");
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$stop;
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end
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else begin
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$write("*-* All Finished *-*\n");
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$finish;
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end
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end
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endmodule
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