verilator/test_regress/t/t_flag_topmodule_inline.pl
Wilson Snyder 6d3dd98e77 Fix "cloning" error with -y/--top-module, bug76.
Caused by missorting top-module cells; so move code from V3LinkLevel into
V3LinkCells.
2009-04-06 22:26:38 -04:00

19 lines
493 B
Perl
Executable File

#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2008 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
compile (
v_flags2 => ["--top-module b"],
) if $Self->{v3};
execute (
check_finished=>1,
) if $Self->{v3};
ok(1);
1;