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15 lines
433 B
Systemverilog
15 lines
433 B
Systemverilog
// DESCRIPTION: Verilator: Verilog Test module
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//
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// This file ONLY is placed under the Creative Commons Public Domain, for
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// any use, without warranty, 2023 by Wilson Snyder.
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// SPDX-License-Identifier: CC0-1.0
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// Check that lint_off doesn't propagate from include, for post-preprocessor warnings
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`include "t_lint_warn_incfile2_bad_b.vh"
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module t;
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sub sub();
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int warn_t = 64'h1; // Not suppressed - should warn
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endmodule
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