mirror of
https://github.com/verilator/verilator.git
synced 2025-04-28 19:46:54 +00:00
15 lines
823 B
Plaintext
15 lines
823 B
Plaintext
%Error-PROCASSWIRE: t/t_wire_behp1364_bad.v:24:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'w'
|
|
: ... In instance t
|
|
24 | w = 0;
|
|
| ^
|
|
... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
|
|
%Error-PROCASSWIRE: t/t_wire_behp1364_bad.v:25:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o'
|
|
: ... In instance t
|
|
25 | o = 0;
|
|
| ^
|
|
%Error-PROCASSWIRE: t/t_wire_behp1364_bad.v:26:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'oa'
|
|
: ... In instance t
|
|
26 | oa = 0;
|
|
| ^~
|
|
%Error: Exiting due to
|