mirror of
https://github.com/verilator/verilator.git
synced 2025-01-01 04:07:34 +00:00
03bd1bfc63
This means it applies more widely, e.g. inside sequential logic. |
||
---|---|---|
.. | ||
t | ||
.gdbinit | ||
.gitignore | ||
CMakeLists.txt | ||
driver.py | ||
input.vc | ||
input.xsim.vc | ||
Makefile | ||
Makefile_obj |