$version Generated by SpTraceVcd $end
$date Thu Sep 18 07:54:41 2008
 $end
$timescale 1ns $end

 $scope module TOP $end
  $var wire  1 , CLK $end
  $var wire  1 - RESET $end
  $scope module v $end
   $var wire  1 , CLK $end
   $var wire  1 # RESET $end
   $scope module glbl $end
    $var wire  1 + GSR $end
   $upscope $end
   $scope module neg $end
    $var wire  1 , clk $end
    $var wire 128 ' i128 [63:-64] $end
    $var wire 48 % i48 [-1:-48] $end
    $var wire  8 $ i8 [0:-7] $end
   $upscope $end
  $upscope $end
 $upscope $end
$enddefinitions $end


#0
1#
b00000000 $
b000000000000000000000000000000000000000000000000 %
b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 '
1+
1-
0,
#1
#2
#3
b11111111 $
b111111111111111111111111111111111111111111111111 %
b11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 '
1,
#4
#5
#6
0,
#7
0+
#8
#9
0#
b00000000 $
b000000000000000000000000000000000000000000000000 %
b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 '
0-
1,
#10
#11
#12
0,
#13
#14
#15
b11111111 $
b111111111111111111111111111111111111111111111111 %
b11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 '
1,
#16
#17
#18
0,
#19
#20