// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2010 by Wilson Snyder.

`verilator_config

lint_off -msg CASEINCOMPLETE -file "t/t_vlt_warn.v"
lint_off -msg WIDTH          -file "t/t_vlt_warn.v" -lines 18
lint_off -msg WIDTH          -file "t/t_vlt_warn.v" -lines 19-19

coverage_off -file "t/t_vlt_warn.v"
// Test --flag is also accepted
tracing_off --file "t/t_vlt_warn.v"