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f818ddc71c
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5 Commits

Author SHA1 Message Date
Wilson Snyder
f818ddc71c Internals: Detab and fix spacing style issues in tests and scripts. No functional change. 2019-05-07 22:34:09 -04:00
Wilson Snyder
35be80f789 Tests: Use vlt_all for any Verilator test. 2018-05-08 19:39:32 -04:00
Wilson Snyder
c29e7619eb Tests: Support multiple scenario testing. 2018-05-07 20:42:28 -04:00
Wilson Snyder
a265417727 Tests: Cleanup Perl indentations. No functional change. 2018-05-06 22:39:18 -04:00
Jie Xu
7ef84df852 Add optimization of wires from arrayed cells, msg1447. 
Signed-off-by: Wilson Snyder <wsnyder@wsnyder.org>
 2014-11-05 21:09:35 -05:00