Commit Graph

78 Commits

Author SHA1 Message Date
Wilson Snyder
c2a524d80b Commentary (#4175) 2023-05-07 08:36:03 -04:00
Iztok Jeras
2aa6a229ca
Change range order warning from LITENDIAN to ASCRANGE (#4010) 2023-03-20 20:44:11 -04:00
Ryszard Rozak
1ac721af8f
Add STATICVAR warning and convert to automatic (#4027) (#4030)
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
2023-03-17 07:48:41 -04:00
Andrew Nolte
fc17ab280a
Add --public-depth to force public to a certain instance depth (#3952) 2023-03-09 21:48:05 -05:00
Andrew Nolte
13c9877099
Add --public-params flag (#3990) 2023-03-08 19:38:26 -05:00
Wilson Snyder
adf1de45de With -Wpedantic change ASSIGNIN to a warning 2023-02-21 16:45:35 -05:00
Wilson Snyder
026bbc306b Removed deprecated --cdc option. 2023-02-13 22:49:51 -05:00
Aleksander Kiryk
31130c4b4a
Fix std:: to be parsed first (#3864) (#3928) 2023-02-03 09:04:16 -05:00
Kamil Rakoczy
6ea725f479
Add --verilate-jobs option (#3889)
Currently this option isn't used, but in the future it will be used to specify parallelization of Verilation step.
2023-01-22 21:52:52 -05:00
Ryszard Rozak
4784daa7dc
Add IMPLICITSTATIC warning when a ftask/function is implicitly static (#3839) 2023-01-05 17:42:05 -05:00
Wilson Snyder
b24d7c83d3 Copyright year update 2023-01-01 10:18:39 -05:00
Aleksander Kiryk
c2b09e35f8
Support unpacked structs (#3802) 2022-12-20 19:22:42 -05:00
Wilson Snyder
afc66f6a85 Fix make jobserver with submakes (#3758). 2022-12-11 14:19:40 -05:00
Wilson Snyder
b6cdae30f6 docs: Fix grammar. 2022-12-10 20:09:47 -05:00
Wilson Snyder
d61ad04f32 docs: Fix and test for AsciiDoc breaks (#3728) 2022-12-09 21:01:33 -05:00
Wilson Snyder
fc2654f1f6 msg 2022-12-09 20:17:19 -05:00
Mariusz Glebocki
d0e7177d8e
Disable stack size limit (#3706) (#3751) 2022-11-19 14:44:54 -05:00
Wilson Snyder
0a045a7bf6 Change ENDLABEL from warning into an error. 2022-11-12 12:09:48 -05:00
Kamil Rakoczy
d6126c4b32
Remove --no-threads; require --threads 1 for single threaded (#3703). 2022-11-05 08:47:34 -04:00
Wilson Snyder
7e1b92fa75 Add --get-supported to determine what features are in Verilator (#3688). 2022-10-20 21:42:30 -04:00
Krzysztof Bieganski
bec0b7d4d0
Disallow delays with --lib-create (#3691) 2022-10-19 20:52:29 -04:00
Topa Topino
46c5764383
Split UNUSED warning into genvar, param, and signal warnings (#3607) 2022-10-17 19:51:13 -04:00
Wilson Snyder
cb7b024e8f Commentary: Spelling, and add upgrade notes (#3462) 2022-10-16 11:10:41 -04:00
Geza Lore
f87fe4c3b4 DfgPeephole: add constant folding for all integer types
Also added a testing only -fno-const-before-dfg option, as otherwise
V3Const eats up a lot of the simple inputs. A lot of the things V3Const
swallows in the simple cases can make it to DFG in complex cases, or DFG
itself can create them during optimization. In any case to save
complexity of testing DFG constant folding, we use this option to turn
off V3Const prior to the DFG passes in the relevant test.
2022-10-05 12:05:40 +01:00
Wilson Snyder
90009b9ec7 Commentary: Fix sphinx doc warnings 2022-10-02 16:47:32 -04:00
Wilson Snyder
880cac2fdd Merge branch 'master' into develop-v5 2022-10-01 11:24:55 -04:00
Marcel Chang
526e6b9fc7
Add --dump-tree-dot to enable dumping Ast Tree .dot files (#3636) 2022-10-01 11:05:33 -04:00
Wilson Snyder
cd2a5771b8 Add --timing to --binary (#3625). 2022-09-28 19:02:23 -04:00
Wilson Snyder
b92173bf3d Add --binary option as alias of --main --exe --build (#3625). 2022-09-28 09:04:33 -04:00
Geza Lore
47bce4157d
Introduce DFG based combinational logic optimizer (#3527)
Added a new data-flow graph (DFG) based combinational logic optimizer.
The capabilities of this covers a combination of V3Const and V3Gate, but
is also more capable of transforming combinational logic into simplified
forms and more.

This entail adding a new internal representation, `DfgGraph`, and
appropriate `astToDfg` and `dfgToAst` conversion functions. The graph
represents some of the combinational equations (~continuous assignments)
in a module, and for the duration of the DFG passes, it takes over the
role of AstModule. A bulk of the Dfg vertices represent expressions.
These vertex classes, and the corresponding conversions to/from AST are
mostly auto-generated by astgen, together with a DfgVVisitor that can be
used for dynamic dispatch based on vertex (operation) types.

The resulting combinational logic graph (a `DfgGraph`) is then optimized
in various ways. Currently we perform common sub-expression elimination,
variable inlining, and some specific peephole optimizations, but there
is scope for more optimizations in the future using the same
representation. The optimizer is run directly before and after inlining.
The pre inline pass can operate on smaller graphs and hence converges
faster, but still has a chance of substantially reducing the size of the
logic on some designs, making inlining both faster and less memory
intensive. The post inline pass can then optimize across the inlined
module boundaries. No optimization is performed across a module
boundary.

For debugging purposes, each peephole optimization can be disabled
individually via the -fno-dfg-peepnole-<OPT> option, where <OPT> is one
of the optimizations listed in V3DfgPeephole.h, for example
-fno-dfg-peephole-remove-not-not.

The peephole patterns currently implemented were mostly picked based on
the design that inspired this work, and on that design the optimizations
yields ~30% single threaded speedup, and ~50% speedup on 4 threads. As
you can imagine not having to haul around redundant combinational
networks in the rest of the compilation pipeline also helps with memory
consumption, and up to 30% peak memory usage of Verilator was observed
on the same design.

Gains on other arbitrary designs are smaller (and can be improved by
analyzing those designs). For example OpenTitan gains between 1-15%
speedup depending on build type.
2022-09-23 16:46:22 +01:00
Geza Lore
ddb678cc5b Merge branch 'master' into develop-v5 2022-09-22 17:33:36 +01:00
Geza Lore
63c694f65f Streamline dump control options
- Rename `--dump-treei` option to `--dumpi-tree`, which itself is now a
  special case of `--dumpi-<tag>` where tag can be a magic word, or a
  filename
- Control dumping via static `dump*()` functions, analogous to `debug()`
- Make dumping independent of the value of `debug()` (so dumping always
  works even without the debug flag)
- Add separate `--dumpi-graph` for dumping V3Graphs, which is again a
  special case of `--dumpi-<tag>`
- Alias `--dump-<tag>` to `--dumpi-<tag> 3` as before
2022-09-22 17:24:41 +01:00
Wilson Snyder
550a5111b7 Commentary 2022-09-20 20:28:43 -04:00
Wilson Snyder
d162619bd3 Merge branch 'master' into develop-v5 2022-09-20 20:06:21 -04:00
Wilson Snyder
fc4ffd454e Rename --bin to --build-dep-bin. 2022-09-18 10:32:43 -04:00
Geza Lore
af305bf280 Merge branch 'master' into develop-v5 2022-09-16 16:24:36 +01:00
Wilson Snyder
ab6e1c2399 Commentary on --main 2022-09-15 20:26:08 -04:00
Kamil Rakoczy
da20da264b
Add --build-jobs, and rework arguments for -j (#3623) 2022-09-15 08:28:58 -04:00
Geza Lore
27031ed688 Merge branch 'master' into develop-v5 2022-09-15 10:28:35 +01:00
Wilson Snyder
75fd71d7e5 Add --main to generate main() C++ (previously was experimental only) (#3265). 2022-09-14 20:18:40 -04:00
Krzysztof Bieganski
39af5d020e
Timing support (#3363)
Adds timing support to Verilator. It makes it possible to use delays,
event controls within processes (not just at the start), wait
statements, and forks.

Building a design with those constructs requires a compiler that
supports C++20 coroutines (GCC 10, Clang 5).

The basic idea is to have processes and tasks with delays/event controls
implemented as C++20 coroutines. This allows us to suspend and resume
them at any time.

There are five main runtime classes responsible for managing suspended
coroutines:
* `VlCoroutineHandle`, a wrapper over C++20's `std::coroutine_handle`
  with move semantics and automatic cleanup.
* `VlDelayScheduler`, for coroutines suspended by delays. It resumes
  them at a proper simulation time.
* `VlTriggerScheduler`, for coroutines suspended by event controls. It
  resumes them if its corresponding trigger was set.
* `VlForkSync`, used for syncing `fork..join` and `fork..join_any`
  blocks.
* `VlCoroutine`, the return type of all verilated coroutines. It allows
  for suspending a stack of coroutines (normally, C++ coroutines are
  stackless).

There is a new visitor in `V3Timing.cpp` which:
  * scales delays according to the timescale,
  * simplifies intra-assignment timing controls and net delays into
    regular timing controls and assignments,
  * simplifies wait statements into loops with event controls,
  * marks processes and tasks with timing controls in them as
    suspendable,
  * creates delay, trigger scheduler, and fork sync variables,
  * transforms timing controls and fork joins into C++ awaits

There are new functions in `V3SchedTiming.cpp` (used by `V3Sched.cpp`)
that integrate static scheduling with timing. This involves providing
external domains for variables, so that the necessary combinational
logic gets triggered after coroutine resumption, as well as statements
that need to be injected into the design eval function to perform this
resumption at the correct time.

There is also a function that transforms forked processes into separate
functions.

See the comments in `verilated_timing.h`, `verilated_timing.cpp`,
`V3Timing.cpp`, and `V3SchedTiming.cpp`, as well as the internals
documentation for more details.

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
2022-08-22 13:26:32 +01:00
Wilson Snyder
ebb37b0156 Merge branch 'master' into develop-v5 2022-08-20 14:02:09 -04:00
Wilson Snyder
90dc04cf93 Add --future0 and --future1 options. 2022-08-20 14:01:13 -04:00
Wilson Snyder
b25b798dbe Merge branch 'master' into develop-v5 2022-07-04 13:20:03 -04:00
Wilson Snyder
fa99cbbc73 Commentary: Fix mis-sorted option names. No functional change. 2022-06-21 19:28:26 -04:00
Wilson Snyder
e7ca4a69e3 Merge branch 'master' into develop-v5 2022-06-19 15:22:09 -04:00
Geza Lore
0c2c097377 Add -fno-merge-cond-motion option
This disables code motion during V3MergeCond, for debugging.
2022-06-13 14:16:11 +01:00
Wilson Snyder
0f324c8309 Merge branch 'master' into develop-v5 2022-06-04 11:59:49 -04:00
Wilson Snyder
67f7432dd7 Commentary (#3436). 2022-06-04 08:37:42 -04:00
Wilson Snyder
ada58465b2 Add -f<optimization> options to replace -O<letter> options (#3436). 2022-06-03 20:43:16 -04:00