github/verilator
1
0
Fork 1
mirror of https://github.com/verilator/verilator.git synced 2025-01-10 16:47:48 +00:00
Code Issues Packages Projects Releases Wiki Activity
981 Commits 2 Branches 161 Tags 124 MiB
b7c2c83c88
Commit Graph

2 Commits

Author SHA1 Message Date
Wilson Snyder
71c1f00ec2 Copyright year update 2011-01-01 18:21:19 -05:00
Wilson Snyder
1e938d0e90 Update preprocessor to match next Verilog-Perl version. 
Fix preprocessor preservation of newlines across macro substitutions.
Fix preprocessor stringification of nested macros.
Fix preprocessor whitespace on define arguments
 2010-07-10 18:30:16 -04:00