Commit Graph

4682 Commits

Author SHA1 Message Date
Geza Lore
686baaf2cf Internals: Streamline trace function generation
Remove magic code fragments form EmitCTrace, so Emit need not be aware
that a function is tracing related or not (apart from the purpose of
file name generation). All necessary code is now generated via text
nodes in V3TraceDecl and V3Trace. No functional change intended.
2021-07-08 02:08:09 +01:00
Geza Lore
76b3776fa3 Change generated tracing routines to use snake_case
For consistency with the rest of the generated code, generated methods
related to tracing now use snake_case instead of camelCase. No
functional change intended.
2021-07-08 02:08:09 +01:00
Wilson Snyder
3ed2af638b devel release 2021-07-07 20:50:11 -04:00
Wilson Snyder
8e2ba6a003 Version bump 2021-07-07 20:43:07 -04:00
Wilson Snyder
3aa6332f25 Fix Codacy warnings. No functional change. 2021-07-07 19:42:49 -04:00
Wilson Snyder
36599133bf Add --prof-c to pass profiling to compiler (#3059). 2021-07-07 19:12:52 -04:00
Wilson Snyder
941f96c913 Commentary 2021-07-07 17:59:22 -04:00
Wilson Snyder
93578d64d2 Internals: Remove old needHeavy code. 2021-07-07 17:56:34 -04:00
Dan Petrisko
8c705ee145
Support middle-of-design nested topmodules (#3026) 2021-07-07 15:00:29 -04:00
Dan Petrisko
c5c5f11e16
Tests: Adding failing test case for source synchronous signals (#3038) 2021-07-07 14:00:17 -04:00
Morten Borup Petersen
fd0446f481
Internals: Add .dot graph visualization of ThreadSchedule (#3048)
* Move MTaskState to ThreadSchedule

MTaskState does not concern itself with sandbagging, and thus solely contains information related to the finalized schedule, i.e., completion time, thread ID and next MTask on thread.

* Add .dot graph visualization of ThreadSchedule

Follow-up to #2779.

This commit adds the creation of .dot files - used by GraphViz - to visualize how mtasks are statically scheduled across the set of specified threads.
We visualize each thread as a row, with nodes of a row being the mtasks scheduled for the given thread. The width of the mtask nodes are proportional to their cost. MTask dependencies are shown using an edge between the source and sink mtasks.
2021-07-06 07:06:00 -04:00
Geza Lore
2ebed755e6 V3Simulate: Avoid copying while managing free list.
V3Simulate reuses allocated AstConst nodes for efficiency, however this
used to be implemented in a way that required a deep copy of a
std::unorderd_map<_, std::deque<_>>, which was quite inefficient when it
grew large. The free list is now managed without any copying. This takes
the V3Table pass from taking 12s to 0.2s on SweRV EH1.
2021-07-05 17:07:33 +01:00
Geza Lore
2a7aa28b20 V3Simulate/V3Table: change deques to vectors for performance
We can get away with only push_back and back on sequence containers, in
which case std::vector is significantly faster than std::deque.
2021-07-05 15:53:56 +01:00
Geza Lore
fb56f4f880 Tests: make t_prot_lib*.pl name mangling deterministic
This is to facilitate diffing generated files in tests.
2021-07-02 00:21:24 +01:00
Geza Lore
d4e73e215e Tests: fail test if vcddiff aborts, fix failing tests
Tests used to silently pass when vcddiff aborted. Now fixed. Updated
large array trace reference files for FST, added same reference files
for VCD.

Developers need to update their local vcddiff.
2021-07-01 23:22:25 +01:00
Geza Lore
d5c9369103
Internals: Fix suspicious dtype clone relinking. (#3056) 2021-07-01 14:33:44 -04:00
Geza Lore
af27702188 Fix type parameter resolution with hash collision.
We incorrectly treated two different struct types the same when passed
as an actual parameter to a `parameter type` parameter in an instance,
if the actual parameter expression both hash to the same value and the
structs have the same struct name. This is now corrected.

Fixes #3055.
2021-07-01 16:52:29 +01:00
Morten Borup Petersen
2c813488f4
Tests: Add simulator benchmarking data option for regression tests (#3054)
This commit adds the '--simbenchmark' option to the regression test compile command.
The option is not intended as a fully-fledged benchmarking infrastructure, but rather a
utility for easily generating cycle- and execution time information when executing a verilated test.

As an example use case, the included test file shows how optimization level is varied across
three different builds+simulations, with the statistics for each run output to the same file in
the output directory.

Future work:
- 'sim_time' in the generated top-level main file should be a parameter.
- Given the above, the test execution script from verilog-sim-benchmark can be integrated
to generate better estimates of cycles/second through varying 'sim_time' over multiple executions.
2021-07-01 11:17:55 -04:00
Geza Lore
708abe0dd1 Introduce model interface class, make $root part or Syms (#3036)
This patch implements #3032. Verilator creates a module representing the
SystemVerilog $root scope (V3LinkLevel::wrapTop). Until now, this was
called the "TOP" module, which also acted as the user instantiated model
class. Syms used to hold a pointer to this root module, but hold
instances of any submodule. This patch renames this root scope module
from "TOP" to "$root", and introduces a separate model class which is
now an interface class. As the root module is no longer the user
interface class, it can now be made an instance of Syms, just like any
other submodule. This allows absolute references into the root module to
avoid an additional pointer indirection resulting in a potential speedup
(about 1.5% on OpenTitan). The model class now also contains all non
design specific generated code (e.g.: eval loops, trace config, etc),
which additionally simplifies Verilator internals.

Please see the updated documentation for the model interface changes.
2021-06-30 16:35:40 +01:00
Yutetsu TAKATSUKASA
22e0f3edbe
Introduce small object optimization to V3Number (#3034) 2021-06-30 21:20:56 +09:00
Felix Yan
2cdf0aae72
Commentary: Correct a typo in configure.ac (#3045) 2021-06-28 23:18:14 -04:00
Wilson Snyder
ee4a601c9e Internals: Use interface initialization for cleaner code. No functional change. 2021-06-28 22:40:39 -04:00
Morten Borup Petersen
e7b6a7ef6a Fix shadowing of vlSymsp member with argument (#3046).
This commit removes shadowing of the vlSymsp member of the emitted
modules, allowing models to compile when -Werror=shadow is set. This may
be useful when i.e., an external project which defines its own error
flags depends on the verilated model.
2021-06-28 20:37:09 +01:00
Geza Lore
2825940fad Fix dtype when simplifying masked shift.
Fixes #3044
2021-06-25 18:06:43 +01:00
Geza Lore
c6f6dab413 Emit: Factor out parts needed for emitting an AstCFunc
Factored out bits from V3EmitC.cpp that is required to emit a whole
(non-trace) AstCFunc. This is mostly what used to be the EmitCStmts
class plus relevant bits from EmitCImp. These now live in EmitCFunc,
which is reusable by anything that needs to emit a regular AstCFunc
(differences in tracing to be addressed later). EmitCImp now extends
EmitCFunc instead of EmitCStmts. No functional change intended.
2021-06-24 19:39:47 +01:00
Geza Lore
bbbee8b89e Make emitVarDecl and emitModCUse reusable via V3EmitCBase.
Moved these 2 function into V3EmitCBase so we can reuse them later.
emitVarDecl required minor alteration to move building of m_ctorVarsVec
back into V3EmitC (which is now done in V3EmitC::emitSortedVarList).
No functional change intended.
2021-06-24 18:15:47 +01:00
Geza Lore
5250408019 Add V3EmitCBase.cpp to hold implementations
No need to keep complex functions in the V3EmitCBase.h header (which is
included in a lot of compilation units). No functional change intended.
2021-06-24 18:04:54 +01:00
Geza Lore
a198a3c1e1 Add extern "C" to function declarations in VPI tests.
These are necessary to link the executables. So far we have been saved
by one of the generated headers forward declaring these functions with
extern "C", but changing that header would break these tests.
2021-06-24 16:48:58 +01:00
Wilson Snyder
f311a0a5a5 Internals: Add const. No functional change. 2021-06-22 08:43:54 -04:00
Geza Lore
ec1c112791
Remove deprecated --inhibit-sim (#3035) 2021-06-21 12:38:42 -04:00
Geza Lore
7ecc2d4df7 V3Hash: Add missing include.
Fixes #3029
2021-06-21 15:32:58 +01:00
Wilson Snyder
512fe0a2d1 Internals: Add const. No functional change. 2021-06-20 18:33:13 -04:00
Yutetsu TAKATSUKASA
ec4eb18846
Fiix incorrect result by bit tree opt (#3023) (#3030)
* Add a test to reproduce #3023. Also applied verilog-mode formatting.

* use unique_ptr. No functional change is intended.

* Introduce restorer that reverts changes during iterate() if failed.
2021-06-21 07:28:39 +09:00
Geza Lore
f064a94f1d Configure time unit/time precision in the Sym constructor.
This used to be done in the constructor of the top module, but there is
no reason to do it there. Internals are cleaner with this in the Sym
constructor. No functional change intended.
2021-06-19 20:42:38 +01:00
Geza Lore
19398efc4c Remove no-op VL_CELL. No functional change intended. 2021-06-19 20:42:38 +01:00
Geza Lore
fcb8bc22bd Internals: Remove m_classPrefix from AstNodeVarRef/AstNodeCCall
This is now redundant and can be reconstituted in V3EmitC without being
explicitly stored.
2021-06-19 20:42:38 +01:00
Wilson Snyder
2ee52222e2 Tests: Add test (#2912). 2021-06-19 14:39:34 -04:00
Wilson Snyder
c11cd18491 In XML, show pinIndex information (#2877). 2021-06-19 13:41:41 -04:00
Geza Lore
eebda248c7 Internals: Use AstUserAllocator in V3Order 2021-06-19 15:23:02 +01:00
Wilson Snyder
8d737271ca Allow configure override of AR program (#2999). 2021-06-19 10:00:31 -04:00
Wilson Snyder
52cde49a6f Internals: Add more const. No functional change. 2021-06-18 22:24:08 -04:00
Geza Lore
6c9c16c31d Simplify redundant masking of AstShiftR/AstShiftL
AND(CONST,SHIFTR(_,C)) appears often after V3Expand, with C a large
enough dense mask (i.e.: of the form  (1 << n) - 1) to make the masking
redundant. E.g.: 0xff & ((uint32_t)a >> 24). V3Const now replaces these
ANDs with the SHIFTR node.

Similarly, we also simplify the same with SHIFTL,
e.g.: 0xff000000 & ((uint32_t)a << 24)
2021-06-18 20:06:53 +01:00
Geza Lore
0c93c3844f Simplify AND(CONST,OR(_,_)) with redundant terms
V3Expand generates a lot of OR nodes that are under a clearing mask, and
have redundant terms, e.g.: 0xff & (a << 8 | b >> 24). The 'a << 8' term
in there is redundant as it's bottom bits are all zero where the mask is
non-zero. V3Const now removes these redundant terms.
2021-06-18 19:07:00 +01:00
Geza Lore
e5e5bc0fa3 Localize variables used in multiple functions
Teach V3Localize how to localize variables that are used in multiple
functions, if in all functions where they are used, they are always
written in whole before being consumed. This allows a lot more variables
to be localized (+20k variables on OpenTitan - when building without
--trace), and can cause significant performance improvement (OpenTitan
simulates 8.5% - build single threaded and withuot --trace).
2021-06-18 16:22:51 +01:00
Geza Lore
d6237e55b2 Internals: Add AstUserNAllocator utility classes.
These utility classes can be used to hang advanced data structures off
AstNode user*u() pointers, and they take care of memory management for
the client. Use via the call operator().
2021-06-18 16:22:51 +01:00
Geza Lore
3ec1e9eb07 Localize variables from other modules when possible
V3Localize can now localize variable references that reference variables
located in scopes different from the referencing function. This also
means V3Descope has now moved after V3Localize.
2021-06-18 16:22:51 +01:00
Geza Lore
d5bdd07c01 Fix out of bounds index into VlWide under AstSel
When part selecting bits via an AstSel in a VlWide, V3Expand used to do
something akin to:

word_index = lsb / 32;
bit_index = lsb % 32;
result =
  wide[word_index + 1] << (32 - bit_index) | wide[word_index] >> bit_index;

The unconditional "+ 1" can cause an out of bounds access into the
VlWide, when the whole of the select is into the most significant word
(i.e.: when word_index is already the most significant word).  We now
emit roughly this instead:

lo_word_index = lsb / 32;
bit_index = lsb % 32;
hi_word_index = (lsb + width - 1) / 32;
result =
  wide[hi_word_index] << (32 - bit_index) | wide[lo_word_index] >> bit_index;

i.e.: we explicitly calculate which word the MSB of the select falls
into, and address that word, rather than the unconditional + 1. The
shifts ensure we still yield the right result, even if lo_word_index and
hi_word_index are the same.

Note: The actual expression created by V3Expand can be a bit more
complicated as we might need to access 3 words when the result is a
QData, all 3 word indices are calculated explicitly.
2021-06-18 14:31:01 +01:00
Wilson Snyder
5fddf51e8c Internals: Favor VlWide over WData arrays. No functional change intended. 2021-06-17 21:17:25 -04:00
Geza Lore
0a28fc8c63 Internals: minor cleanup to V3Descope 2021-06-17 14:30:15 +01:00
Geza Lore
9eafca5e28
Remove deprecated --no-relative-cfuncs (#3024) 2021-06-16 23:17:43 -04:00