github/verilator
1
0
Fork 1
mirror of https://github.com/verilator/verilator.git synced 2025-01-01 04:07:34 +00:00
Code Issues Packages Projects Releases Wiki Activity

Commentary

Browse Source
This commit is contained in:
Wilson Snyder 2021-11-13 15:01:27 -05:00
parent c496649c49
commit fe5822ba54
6 changed files with 9 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
examples/cmake_hello_sc/Makefile
View File

@ -99,7 +99,7 @@ run:
@echo "-- DONE --------------------" @echo "-- DONE --------------------"
@echo "Note: Once this example is understood, see examples/cmake_tracing_sc." @echo "Note: Once this example is understood, see examples/cmake_tracing_sc."
@echo "Note: Also see the EXAMPLE section in the verilator manpage/document." @echo "Note: See also https://verilator.org/guide/latest/examples.html"
clean mostlyclean distclean maintainer-clean: clean mostlyclean distclean maintainer-clean:
@rm -rf build logs @rm -rf build logs

2
examples/make_hello_c/Makefile
View File

@ -40,7 +40,7 @@ default:
obj_dir/Vtop obj_dir/Vtop
@echo "-- DONE --------------------" @echo "-- DONE --------------------"
@echo "Note: Once this example is understood, see examples/make_tracing_c." @echo "Note: Once this example is understood, see examples/make_tracing_c."
@echo "Note: Also see the EXAMPLE section in the verilator manpage/document." @echo "Note: See also https://verilator.org/guide/latest/examples.html"
###################################################################### ######################################################################

3
examples/make_hello_c/top.v
View File

@ -4,7 +4,8 @@
// any use, without warranty, 2017 by Wilson Snyder. // any use, without warranty, 2017 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0 // SPDX-License-Identifier: CC0-1.0
// See also the EXAMPLE section in the verilator manpage/document. // See also https://verilator.org/guide/latest/examples.html"
module top; module top;
initial begin initial begin
$display("Hello World!"); $display("Hello World!");

2
examples/make_hello_sc/Makefile
View File

@ -49,7 +49,7 @@ run:
obj_dir/Vtop obj_dir/Vtop
@echo "-- DONE --------------------" @echo "-- DONE --------------------"
@echo "Note: Once this example is understood, see examples/make_tracing_sc." @echo "Note: Once this example is understood, see examples/make_tracing_sc."
@echo "Note: Also see the EXAMPLE section in the verilator manpage/document." @echo "Note: See also https://verilator.org/guide/latest/examples.html"
###################################################################### ######################################################################

3
examples/make_hello_sc/top.v
View File

@ -4,7 +4,8 @@
// any use, without warranty, 2017 by Wilson Snyder. // any use, without warranty, 2017 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0 // SPDX-License-Identifier: CC0-1.0
// See also the EXAMPLE section in the verilator manpage/document. // See also https://verilator.org/guide/latest/examples.html"
module top; module top;
initial begin initial begin
$display("Hello World!"); $display("Hello World!");

3
examples/make_protect_lib/top.v
View File

@ -4,7 +4,8 @@
// any use, without warranty, 2019 by Todd Strader. // any use, without warranty, 2019 by Todd Strader.
// SPDX-License-Identifier: CC0-1.0 // SPDX-License-Identifier: CC0-1.0
// See also the EXAMPLE section in the verilator manpage/document. // See also https://verilator.org/guide/latest/examples.html"
module top (input clk); module top (input clk);
integer cyc = 0; integer cyc = 0;