Commentary

examples/cmake_hello_sc/Makefile

@@ -99,7 +99,7 @@ run:
 
 	@echo "-- DONE --------------------"
 	@echo "Note: Once this example is understood, see examples/cmake_tracing_sc."
-	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
+	@echo "Note: See also https://verilator.org/guide/latest/examples.html"
 
 clean mostlyclean distclean maintainer-clean:
 	@rm -rf build logs

examples/make_hello_c/Makefile

@@ -40,7 +40,7 @@ default:
 	obj_dir/Vtop
 	@echo "-- DONE --------------------"
 	@echo "Note: Once this example is understood, see examples/make_tracing_c."
-	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
+	@echo "Note: See also https://verilator.org/guide/latest/examples.html"
 
 ######################################################################
 

examples/make_hello_c/top.v

@@ -4,7 +4,8 @@
 // any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
-// See also the EXAMPLE section in the verilator manpage/document.
+// See also https://verilator.org/guide/latest/examples.html"
+
 module top;
    initial begin
       $display("Hello World!");

examples/make_hello_sc/Makefile

@@ -49,7 +49,7 @@ run:
 	obj_dir/Vtop
 	@echo "-- DONE --------------------"
 	@echo "Note: Once this example is understood, see examples/make_tracing_sc."
-	@echo "Note: Also see the EXAMPLE section in the verilator manpage/document."
+	@echo "Note: See also https://verilator.org/guide/latest/examples.html"
 
 ######################################################################
 

examples/make_hello_sc/top.v

@@ -4,7 +4,8 @@
 // any use, without warranty, 2017 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
-// See also the EXAMPLE section in the verilator manpage/document.
+// See also https://verilator.org/guide/latest/examples.html"
+
 module top;
    initial begin
       $display("Hello World!");

examples/make_protect_lib/top.v

@@ -4,7 +4,8 @@
 // any use, without warranty, 2019 by Todd Strader.
 // SPDX-License-Identifier: CC0-1.0
 
-// See also the EXAMPLE section in the verilator manpage/document.
+// See also https://verilator.org/guide/latest/examples.html"
+
 module top (input clk);
 
    integer cyc = 0;