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Commentary: Fix sv-bugpoint paragraph typo (#5558)

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Tomasz Gorochowik 2024-10-24 15:41:27 +02:00 committed by GitHub
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docs/guide/contributing.rst
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@ -73,7 +73,7 @@ Open Source tool called `sv-bugpoint
<https://github.com/antmicro/sv-bugpoint>_` can be used to automatically
reduce a SystemVerilog design to the smallest possible reproducer.
It can be used to automatically reduce a design with hundreds of thousands of
lines design to a minimal test case while preserving the bug-inducing behavior.
lines to a minimal test case while preserving the bug-inducing behavior.
Please refer to the `README
<https://github.com/antmicro/sv-bugpoint/blob/main/README.md>`_ file for more