Fix class reference with pin that is a class reference (#5454).

This commit is contained in:
Wilson Snyder 2024-09-17 17:38:18 -04:00
parent b8bda729d4
commit fb04765c0e
4 changed files with 42 additions and 0 deletions

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@ -44,6 +44,7 @@ Verilator 5.029 devel
* Fix driving clocking block in reactive region (#5430). [Krzysztof Bieganski, Antmicro Ltd.]
* Fix associative array next/prev/first/last mis-propagating constants (#5435). [Ethan Sifferman]
* Fix fault on defparam with UNSUPPORTED ignored (#5450). [Luiza de Melo]
* Fix class reference with pin that is a class reference (#5454).
Verilator 5.028 2024-08-21

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@ -2414,6 +2414,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
void visit(AstCell* nodep) override {
// Cell: Recurse inside or cleanup not founds
checkNoDot(nodep);
VL_RESTORER(m_usedPins);
m_usedPins.clear();
UASSERT_OBJ(nodep->modp(), nodep,
"Cell has unlinked module"); // V3LinkCell should have errored out
@ -2443,6 +2444,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
void visit(AstClassRefDType* nodep) override {
// Cell: Recurse inside or cleanup not founds
checkNoDot(nodep);
VL_RESTORER(m_usedPins);
m_usedPins.clear();
UASSERT_OBJ(nodep->classp(), nodep, "ClassRef has unlinked class");
UASSERT_OBJ(m_statep->forPrimary() || !nodep->paramsp(), nodep,
@ -3054,6 +3056,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
void visit(AstClassOrPackageRef* nodep) override {
// Class: Recurse inside or cleanup not founds
// checkNoDot not appropriate, can be under a dot
VL_RESTORER(m_usedPins);
m_usedPins.clear();
UASSERT_OBJ(m_statep->forPrimary() || VN_IS(nodep->classOrPackageNodep(), ParamTypeDType)
|| nodep->classOrPackagep(),
@ -4002,6 +4005,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
UASSERT_OBJ(ifacep, nodep, "Port parameters of AstIfaceRefDType without ifacep()");
if (ifacep->dead()) return;
checkNoDot(nodep);
VL_RESTORER(m_usedPins);
m_usedPins.clear();
VL_RESTORER(m_pinSymp);
m_pinSymp = m_statep->getNodeSym(ifacep);

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@ -0,0 +1,16 @@
#!/usr/bin/env python3
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2024 by Wilson Snyder. This program is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
import vltest_bootstrap
test.scenarios('linter')
test.lint()
test.passes()

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@ -0,0 +1,21 @@
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2024 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
class Cls#(type T = bit);
endclass
module t(/*AUTOARG*/);
Cls#(bit) cb;
Cls#(Cls#(bit)) ccb;
initial begin
$write("*-* All Finished *-*\n");
$finish;
end
endmodule