Support class parameters without initial values.

Changes

@@ -21,6 +21,7 @@ Verilator 5.007 devel
 * Support unpacked unions.
 * Support interface classes and class implements.
 * Support global clocking and $global_clock.
+* Support class parameters without initial values.
 * Support struct I/O in --lib-create (#3378) (#3892). [Varun Koyyalagunta]
 * Support function calls without parenthesis (#3903) (#3902). [Ryszard Rozak, Antmicro Ltd]
 * Support class extending its parameter (#3904). [Ryszard Rozak, Antmicro Ltd]

src/V3Param.cpp

@@ -820,12 +820,18 @@ class ParamProcessor final {
         }
 
         for (auto* stmtp = srcModpr->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
-            if (auto* dtypep = VN_CAST(stmtp, ParamTypeDType)) {
+            if (AstParamTypeDType* dtypep = VN_CAST(stmtp, ParamTypeDType)) {
                 if (VN_IS(dtypep->subDTypep(), VoidDType)) {
                     nodep->v3error("Missing type parameter: " << dtypep->prettyNameQ());
                     VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
                 }
             }
+            if (AstVar* const varp = VN_CAST(stmtp, Var)) {
+                if (VN_IS(srcModpr, Class) && varp->isParam() && !varp->valuep()) {
+                    nodep->v3error("Class parameter without initial value is never given value"
+                                   << " (IEEE 1800-2017 6.20.1): " << varp->prettyNameQ());
+                }
+            }
         }
 
         // Delete the parameters from the cell; they're not relevant any longer.
@@ -911,6 +917,7 @@ class ParamVisitor final : public VNVisitor {
     bool m_iterateModule = false;  // Iterating module body
     string m_generateHierName;  // Generate portion of hierarchy name
     string m_unlinkedTxt;  // Text for AstUnlinkedRef
+    AstNodeModule* m_modp;  // Module iterating
     std::vector<AstDot*> m_dots;  // Dot references to process
     std::multimap<bool, AstNode*> m_cellps;  // Cells left to process (in current module)
     std::multimap<int, AstNodeModule*> m_workQueue;  // Modules left to process
@@ -941,7 +948,11 @@ class ParamVisitor final : public VNVisitor {
             if (modp->someInstanceName().empty()) modp->someInstanceName(modp->origName());
 
             // Iterate the body
-            iterateChildren(modp);
+            {
+                VL_RESTORER(m_modp);
+                m_modp = modp;
+                iterateChildren(modp);
+            }
 
             // Process interface cells, then non-interface cells, which may reference an interface
             // cell.
@@ -1053,7 +1064,7 @@ class ParamVisitor final : public VNVisitor {
         if (nodep->user5SetOnce()) return;  // Process once
         iterateChildren(nodep);
         if (nodep->isParam()) {
-            if (!nodep->valuep()) {
+            if (!nodep->valuep() && !VN_IS(m_modp, Class)) {
                 nodep->v3error("Parameter without initial value is never given value"
                                << " (IEEE 1800-2017 6.20.1): " << nodep->prettyNameQ());
             } else {

test_regress/t/t_class_param_noinit.pl

@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;

test_regress/t/t_class_param_noinit.v

@@ -0,0 +1,17 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+// No init value is legal with classes, as long as not used without the parameter
+class Cls #(int A, int B);
+endclass
+
+module t(/*AUTOARG*/);
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

test_regress/t/t_class_param_noinit_bad.out

@@ -0,0 +1,5 @@
+%Error: t/t_class_param_noinit_bad.v:13:7: Class parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'B'
+                                         : ... In instance t
+   13 |       Cls #(1) c;   
+      |       ^~~
+%Error: Exiting due to

test_regress/t/t_class_param_noinit_bad.pl

@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;

test_regress/t/t_class_param_noinit_bad.v

@@ -0,0 +1,18 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+// No init value is legal with classes, as long as not used without the parameter
+class Cls #(int A, int B);
+endclass
+
+module t(/*AUTOARG*/);
+   initial begin
+      Cls #(1) c;  // Bad: missing B
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule