diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 0216bbb3e..3027259f5 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1450,7 +1450,7 @@ public:
     void name(const string& name) override { m_name = name; }
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
     string emitC() override { V3ERROR_NA_RETURN(""); }
-    bool cleanOut() const override { return false; }
+    bool cleanOut() const override { return true; }
     bool same(const AstNode* samep) const override { return true; }  // dtype comparison does it
     int instrCount() const override { return widthInstrs(); }
     AstVar* varp() const { return m_varp; }
diff --git a/test_regress/t/t_struct_assign.v b/test_regress/t/t_struct_assign.v
index c0dc33341..75939c37b 100644
--- a/test_regress/t/t_struct_assign.v
+++ b/test_regress/t/t_struct_assign.v
@@ -9,7 +9,12 @@ module t (/*AUTOARG*/);
       int fst, snd;
    } pair_t;
 
+   class Cls;
+      pair_t p;
+   endclass
+
    pair_t a, b;
+   Cls c = new;
 
    initial begin
       a.fst = 1;
@@ -21,6 +26,15 @@ module t (/*AUTOARG*/);
 
       $display("(%d, %d) (%d, %d)", a.fst, a.snd, b.fst, b.snd);
       $display("%%p=%p", a);
+
+      c.p.fst = 5;
+      if (c.p.fst != 5) $stop;
+      a = c.p;
+      if (a.fst != 5) $stop;
+      c.p = b;
+      if (c.p.fst != 3) $stop;
+      if (c.p.snd != 4) $stop;
+
       $write("*-* All Finished *-*\n");
       $finish;
    end