From decfa6bd7a26f8d11da73910881d29f354c344b9 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Fri, 11 Feb 2022 17:03:12 +0000
Subject: [PATCH] V3Order: Use unique ordinals per function name

This helps diffing generated code after reordering output, otherwise no
functional change.
---
 src/V3Order.cpp                      | 23 +++++++++++------------
 test_regress/t/t_protect_ids_key.out |  4 ++--
 test_regress/t/t_verilated_debug.out |  4 ++--
 test_regress/t/t_xml_debugcheck.out  |  8 ++++----
 4 files changed, 19 insertions(+), 20 deletions(-)

diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index fecee609e..433082e68 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -1054,8 +1054,8 @@ public:
 
 class OrderProcess final : VNDeleter {
     // NODE STATE
-    //  AstNodeModule::user3  -> int: Number of AstCFuncs created under this module
-    //  AstNode::user4        -> Used by V3Const::constifyExpensiveEdit
+    //  AstNode::user3  -> Used by loop reporting
+    //  AstNode::user4  -> Used by V3Const::constifyExpensiveEdit
     const VNUser3InUse user3InUse;
 
     // STATE
@@ -1073,6 +1073,7 @@ class OrderProcess final : VNDeleter {
     friend class OrderMoveDomScope;
     V3List<OrderMoveDomScope*> m_pomReadyDomScope;  // List of ready domain/scope pairs, by loopId
     std::vector<OrderVarStdVertex*> m_unoptflatVars;  // Vector of variables in UNOPTFLAT loop
+    std::map<std::pair<AstNodeModule*, std::string>, unsigned> m_funcNums;  // Function ordinals
 
     // STATS
     std::array<VDouble0, OrderVEdgeType::_ENUM_END> m_statCut;  // Count of each edge type cut
@@ -1115,16 +1116,14 @@ class OrderProcess final : VNDeleter {
 
     string cfuncName(AstNodeModule* modp, AstSenTree* domainp, AstScope* scopep,
                      AstNode* forWhatp) {
-        modp->user3Inc();
-        const int funcnum = modp->user3();
-        string name = (domainp->hasCombo()
-                           ? "_combo"
-                           : (domainp->hasInitial()
-                                  ? "_initial"
-                                  : (domainp->hasSettle()
-                                         ? "_settle"
-                                         : (domainp->isMulti() ? "_multiclk" : "_sequent"))));
-        name = name + "__" + scopep->nameDotless() + "__" + cvtToStr(funcnum);
+        string name = domainp->hasCombo()     ? "_combo"
+                      : domainp->hasInitial() ? "_initial"
+                      : domainp->hasSettle()  ? "_settle"
+                      : domainp->isMulti()    ? "_multiclk"
+                                              : "_sequent";
+        name = name + "__" + scopep->nameDotless();
+        const unsigned funcnum = m_funcNums.emplace(std::make_pair(modp, name), 0).first->second++;
+        name = name + "__" + cvtToStr(funcnum);
         if (v3Global.opt.profCFuncs()) {
             name += "__PROF__" + forWhatp->fileline()->profileFuncname();
         }
diff --git a/test_regress/t/t_protect_ids_key.out b/test_regress/t/t_protect_ids_key.out
index 4575b30b0..45059c7d7 100644
--- a/test_regress/t/t_protect_ids_key.out
+++ b/test_regress/t/t_protect_ids_key.out
@@ -29,8 +29,8 @@
   <map from="PSOLeN" to="_eval_initial_loop"/>
   <map from="PSBUJ6" to="_eval_settle"/>
   <map from="PSAsei" to="_final"/>
-  <map from="PSV5uq" to="_sequent__TOP__1"/>
-  <map from="PS8sdG" to="_sequent__TOP__t__DOT__secret_inst__1"/>
+  <map from="PSQAYU" to="_sequent__TOP__0"/>
+  <map from="PS18yi" to="_sequent__TOP__t__DOT__secret_inst__0"/>
   <map from="PScyq8" to="clk"/>
   <map from="PSnRoO" to="secret_inst"/>
   <map from="PSS3Gk" to="secret_sub"/>
diff --git a/test_regress/t/t_verilated_debug.out b/test_regress/t/t_verilated_debug.out
index 932ee8483..9cbfc96c8 100644
--- a/test_regress/t/t_verilated_debug.out
+++ b/test_regress/t/t_verilated_debug.out
@@ -8,7 +8,7 @@ internalsDump:
 -V{t#,#}+++++TOP Evaluate Vt_verilated_debug::eval_step
 -V{t#,#}+    Vt_verilated_debug___024root___eval_debug_assertions
 -V{t#,#}+    Vt_verilated_debug___024root___eval_initial
--V{t#,#}+    Vt_verilated_debug___024root___initial__TOP__1
+-V{t#,#}+    Vt_verilated_debug___024root___initial__TOP__0
   Data: w96: 000000aa 000000bb 000000cc 
 -V{t#,#}+ Initial loop
 -V{t#,#}+    Vt_verilated_debug___024root___eval_settle
@@ -19,6 +19,6 @@ internalsDump:
 -V{t#,#}+    Vt_verilated_debug___024root___eval_debug_assertions
 -V{t#,#}+ Clock loop
 -V{t#,#}+    Vt_verilated_debug___024root___eval
--V{t#,#}+    Vt_verilated_debug___024root___sequent__TOP__2
+-V{t#,#}+    Vt_verilated_debug___024root___sequent__TOP__0
 *-* All Finished *-*
 -V{t#,#}+    Vt_verilated_debug___024root___final
diff --git a/test_regress/t/t_xml_debugcheck.out b/test_regress/t/t_xml_debugcheck.out
index 7df0425da..7ef8e07b3 100644
--- a/test_regress/t/t_xml_debugcheck.out
+++ b/test_regress/t/t_xml_debugcheck.out
@@ -28,7 +28,7 @@
       <topscope loc="d,10,8,10,9">
         <scope loc="d,10,8,10,9" name="TOP"/>
       </topscope>
-      <cfunc loc="d,60,4,60,10" name="_sequent__TOP__1">
+      <cfunc loc="d,60,4,60,10" name="_sequent__TOP__0">
         <var loc="d,22,13,22,16" name="__Vdly__t.cyc" dtype_id="3" vartype="integer" origName="__Vdly__t__DOT__cyc"/>
         <var loc="d,23,9,23,10" name="__Vdly__t.e" dtype_id="2" vartype="my_t" origName="__Vdly__t__DOT__e"/>
         <var loc="d,67,119,67,123" name="__Vtemp_h########__0" dtype_id="4" vartype="string" origName="__Vtemp_h########__0"/>
@@ -842,7 +842,7 @@
           <varref loc="d,64,3,64,4" name="t.e" dtype_id="5"/>
         </assignpost>
       </cfunc>
-      <cfunc loc="d,22,19,22,20" name="_initial__TOP__2">
+      <cfunc loc="d,22,19,22,20" name="_initial__TOP__0">
         <var loc="d,27,11,27,14" name="t.all" dtype_id="4" vartype="string" origName="t__DOT__all"/>
         <var loc="d,51,17,51,18" name="t.unnamedblk1.e" dtype_id="2" vartype="my_t" origName="t__DOT__unnamedblk1__DOT__e"/>
         <var loc="d,48,123,48,127" name="__Vtemp_h########__0" dtype_id="4" vartype="string" origName="__Vtemp_h########__0"/>
@@ -1398,7 +1398,7 @@
             </not>
           </and>
           <begin>
-            <ccall loc="d,60,4,60,10" func="_sequent__TOP__1"/>
+            <ccall loc="d,60,4,60,10" func="_sequent__TOP__0"/>
           </begin>
         </if>
         <assign loc="d,14,10,14,13" dtype_id="8">
@@ -1411,7 +1411,7 @@
           <varref loc="d,14,10,14,13" name="clk" dtype_id="8"/>
           <varref loc="d,14,10,14,13" name="__Vclklast__TOP__clk" dtype_id="8"/>
         </assign>
-        <ccall loc="d,22,19,22,20" func="_initial__TOP__2"/>
+        <ccall loc="d,22,19,22,20" func="_initial__TOP__0"/>
       </cfunc>
       <cfunc loc="d,10,8,10,9" name="_eval_settle"/>
       <cfunc loc="d,10,8,10,9" name="_final"/>