VPI error instead of fatal for vpi_get_value() on large signals (#5571)

include/verilated_vpi.cpp

@@ -2415,9 +2415,11 @@ void vl_get_value(const VerilatedVar* varp, void* varDatap, p_vpi_value valuep,
         } else if (varp->vltype() == VLVT_WDATA) {
             const int words = VL_WORDS_I(varp->packed().elements());
             if (VL_UNCOVERABLE(words >= VL_VALUE_STRING_MAX_WORDS)) {
-                VL_FATAL_MT(__FILE__, __LINE__, "",
+                VL_VPI_ERROR_(
-                            "vpi_get_value with more than VL_VALUE_STRING_MAX_WORDS; increase and "
+                    __FILE__, __LINE__,
-                            "recompile");
+                    "vpi_get_value with more than VL_VALUE_STRING_MAX_WORDS; increase and "
+                    "recompile");
+                return;
             }
             const WDataInP datap = (reinterpret_cast<EData*>(varDatap));
             for (int i = 0; i < words; ++i) {

test_regress/driver.py

@@ -683,7 +683,8 @@ class VlTest:
         self.all_run_flags = []
 
         self.pli_flags = [
-            "-I" + os.environ['VERILATOR_ROOT'] + "/include/vltstd", "-fPIC", "-shared"
+            "-I" + os.environ['VERILATOR_ROOT'] + "/include/vltstd",
+            "-I" + os.environ['VERILATOR_ROOT'] + "/include", "-fPIC", "-shared"
         ]
         if platform.system() == 'Darwin':
             self.pli_flags += ["-Wl,-undefined,dynamic_lookup"]

test_regress/t/t_vpi_var.cpp

@@ -34,6 +34,10 @@
 
 #endif
 
+#ifdef VERILATOR
+#include "verilated.h"
+#endif
+
 #include <cmath>
 #include <cstdio>
 #include <cstdlib>
@@ -253,6 +257,29 @@ int _mon_check_value_callbacks() {
     return 0;
 }
 
+int _mon_check_too_big() {
+#ifdef VERILATOR
+    s_vpi_value v;
+    v.format = vpiVectorVal;
+
+    TestVpiHandle h = VPI_HANDLE("too_big");
+    CHECK_RESULT_NZ(h);
+
+    Verilated::fatalOnVpiError(false);
+    vpi_get_value(h, &v);
+    Verilated::fatalOnVpiError(true);
+    s_vpi_error_info info;
+    CHECK_RESULT_NZ(vpi_chk_error(&info));
+
+    v.format = vpiStringVal;
+    vpi_get_value(h, &v);
+    CHECK_RESULT_Z(vpi_chk_error(nullptr));
+    CHECK_RESULT_CSTR_STRIP(v.value.str, "some text");
+#endif
+
+    return 0;
+}
+
 int _mon_check_var() {
     TestVpiHandle vh1 = VPI_HANDLE("onebit");
     CHECK_RESULT_NZ(vh1);
@@ -935,6 +962,7 @@ extern "C" int mon_check() {
     if (int status = _mon_check_putget_str(NULL)) return status;
     if (int status = _mon_check_vlog_info()) return status;
     if (int status = _mon_check_delayed()) return status;
+    if (int status = _mon_check_too_big()) return status;
 #ifndef IS_VPI
     VerilatedVpi::selfTest();
 #endif

test_regress/t/t_vpi_var.v

@@ -49,6 +49,7 @@ extern "C" int mon_check();
    reg [31:0]      text_word    /*verilator public_flat_rw @(posedge clk) */;
    reg [63:0]      text_long    /*verilator public_flat_rw @(posedge clk) */;
    reg [511:0]     text         /*verilator public_flat_rw @(posedge clk) */;
+   reg [2047:0]    too_big      /*verilator public_flat_rw @(posedge clk) */;
 
    integer        status;
 
@@ -68,6 +69,7 @@ extern "C" int mon_check();
       text_word = "Word";
       text_long = "Long64b";
       text = "Verilog Test module";
+      too_big = "some text";
 
       real1 = 1.0;
       str1 = "hello";

test_regress/t/t_vpi_var2.v

@@ -67,6 +67,7 @@ extern "C" int mon_check();
    reg [31:0]      text_word;
    reg [63:0]      text_long;
    reg [511:0]     text;
+   reg [2047:0]    too_big;
 /*verilator public_off*/
    integer        status;
 
@@ -88,6 +89,7 @@ extern "C" int mon_check();
       text_word = "Word";
       text_long = "Long64b";
       text = "Verilog Test module";
+      too_big = "some text";
 
       real1 = 1.0;
       str1 = "hello";

test_regress/t/t_vpi_var3.v

@@ -49,6 +49,7 @@ extern "C" int mon_check();
    reg [31:0]      text_word;
    reg [63:0]      text_long;
    reg [511:0]     text;
+   reg [2047:0]    too_big;
 
    integer        status;
 
@@ -68,6 +69,7 @@ extern "C" int mon_check();
       text_word = "Word";
       text_long = "Long64b";
       text = "Verilog Test module";
+      too_big = "some text";
 
       real1 = 1.0;
       str1 = "hello";