diff --git a/Changes b/Changes index f1d8d0b3d..5f835040b 100644 --- a/Changes +++ b/Changes @@ -35,6 +35,7 @@ Verilator 5.015 devel * Fix reference to extended class in parameterized class (#4466). * Fix display %x formatting of real. * Fix mis-warning on #() in classes' own functions. +* Fix IGNOREDRETURN to not warn on void-cast static function calls. * Fix ZERODLY to not warn on 'wait(0)'. diff --git a/src/verilog.y b/src/verilog.y index 34410ffdc..65d92bc6b 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -3558,9 +3558,11 @@ statement_item: // IEEE: statement_item // // Alternative would be shim with new AstVoidStmt. | yVOID yP_TICK '(' task_subroutine_callNoMethod ')' ';' { $$ = $4; - FileLine* const newfl = new FileLine{$$->fileline()}; + AstNode* callp = $$; + while (AstDot* const dotp = VN_CAST(callp, Dot)) callp = dotp->rhsp(); + FileLine* const newfl = new FileLine{callp->fileline()}; newfl->warnOff(V3ErrorCode::IGNOREDRETURN, true); - $$->fileline(newfl); + callp->fileline(newfl); $$ = VN_AS($$, NodeExpr)->makeStmt(); } | yVOID yP_TICK '(' expr '.' task_subroutine_callNoMethod ')' ';' { $$ = new AstDot{$5, false, $4, $6}; diff --git a/test_regress/t/t_func_void.v b/test_regress/t/t_func_void.v index ca357d7ce..5d013b936 100644 --- a/test_regress/t/t_func_void.v +++ b/test_regress/t/t_func_void.v @@ -15,6 +15,12 @@ module t (clk); side_effect += in + 1; endfunction + class Cls; + static function int initialize(); + return 6; + endfunction + endclass + initial begin int got; side_effect = 1; @@ -30,6 +36,8 @@ module t (clk); void'(f1(30)); if (side_effect != 64) $stop; // + void'(Cls::initialize()); + // $write("*-* All Finished *-*\n"); $finish; end