diff --git a/Changes b/Changes
index 4d913ef9e..e9ed34013 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,8 @@ Verilator 5.027 devel
 
 **Minor:**
 
+* Fix fusing macro arguments to not ignore whitespace (#5061). [Tudor Timi]
+
 
 Verilator 5.026 2024-06-15
 ==========================
diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp
index e5f930387..38787946c 100644
--- a/src/V3PreProc.cpp
+++ b/src/V3PreProc.cpp
@@ -995,7 +995,7 @@ int V3PreProcImp::getStateToken() {
         int tok = getRawToken();
 
         // Most states emit white space and comments between tokens. (Unless collecting a string)
-        if (tok == VP_WHITE && state() != ps_STRIFY) return tok;
+        if (tok == VP_WHITE && state() != ps_STRIFY && state() != ps_JOIN) return tok;
         if (tok == VP_BACKQUOTE && state() != ps_STRIFY) tok = VP_TEXT;
         if (tok == VP_COMMENT) {
             if (!m_off) {
@@ -1417,7 +1417,7 @@ int V3PreProcImp::getStateToken() {
             }
         }
         case ps_JOIN: {
-            if (tok == VP_SYMBOL || tok == VP_TEXT || tok == VP_STRING) {
+            if (tok == VP_SYMBOL || tok == VP_TEXT || tok == VP_STRING || tok == VP_WHITE) {
                 UASSERT(!m_joinStack.empty(), "`` join stack empty, but in a ``");
                 const string lhs = m_joinStack.top();
                 m_joinStack.pop();
@@ -1429,7 +1429,7 @@ int V3PreProcImp::getStateToken() {
                 unputString(out);
                 statePop();
                 goto next_tok;
-            } else if (tok == VP_EOF || tok == VP_WHITE || tok == VP_COMMENT) {
+            } else if (tok == VP_EOF || tok == VP_COMMENT) {
                 // Other compilers just ignore this, so no warning
                 // "Expecting symbol to terminate ``; whitespace etc cannot
                 // follow ``. Found: "+tokenName(tok)+"\n"
diff --git a/test_regress/t/t_preproc.out b/test_regress/t/t_preproc.out
index f6fbc86cb..bfaedd871 100644
--- a/test_regress/t/t_preproc.out
+++ b/test_regress/t/t_preproc.out
@@ -164,17 +164,17 @@ bar_suffix  more
 
 `line 86 "t/t_preproc.v" 0
  
-
-
-`line 88 "t/t_preproc.v" 0
-	$c("Zap(\"",bug1,"\");");;
+arg suffix_after_space
 
 `line 89 "t/t_preproc.v" 0
-	$c("Zap(\"","bug2","\");");;
+ 
+
 
 `line 91 "t/t_preproc.v" 0
- 
- 
+	$c("Zap(\"",bug1,"\");");;
+
+`line 92 "t/t_preproc.v" 0
+	$c("Zap(\"","bug2","\");");;
 
 `line 94 "t/t_preproc.v" 0
  
@@ -183,6 +183,10 @@ bar_suffix  more
 `line 97 "t/t_preproc.v" 0
  
  
+
+`line 100 "t/t_preproc.v" 0
+ 
+ 
  
  
  
@@ -202,7 +206,7 @@ bar_suffix  more
       $display("left side: \"right side\"");
       $display("standalone");
 
-`line 118 "t/t_preproc.v" 0
+`line 121 "t/t_preproc.v" 0
        
  
 
@@ -213,78 +217,78 @@ bar_suffix  more
    end
 endmodule
 
-`line 128 "t/t_preproc.v" 0
- 
- 
-
 `line 131 "t/t_preproc.v" 0
  
+ 
+
+`line 134 "t/t_preproc.v" 0
+ 
 
 
 
 
-`line 136 "t/t_preproc.v" 0
+`line 139 "t/t_preproc.v" 0
 module add1 ( input wire d1, output wire o1);
  
-`line 137 "t/t_preproc.v" 0
+`line 140 "t/t_preproc.v" 0
 wire  tmp_d1 = d1; 
-`line 137 "t/t_preproc.v" 0
+`line 140 "t/t_preproc.v" 0
 wire  tmp_o1 = tmp_d1 + 1; 
-`line 137 "t/t_preproc.v" 0
+`line 140 "t/t_preproc.v" 0
 assign o1 = tmp_o1 ;    
 endmodule
 module add2 ( input wire d2, output wire o2);
  
-`line 140 "t/t_preproc.v" 0
+`line 143 "t/t_preproc.v" 0
 wire  tmp_d2 = d2; 
-`line 140 "t/t_preproc.v" 0
+`line 143 "t/t_preproc.v" 0
 wire  tmp_o2 = tmp_d2 + 1; 
-`line 140 "t/t_preproc.v" 0
+`line 143 "t/t_preproc.v" 0
 assign o2 = tmp_o2 ;   
 endmodule
 
-`line 143 "t/t_preproc.v" 0
+`line 146 "t/t_preproc.v" 0
   
 
 
 
 
 
-`line 149 "t/t_preproc.v" 0
+`line 152 "t/t_preproc.v" 0
  
   
   
   
 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
    
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
    generate for (i=0; i<(3); i=i+1) begin 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
       psl cover {  m5k.f .ctl._ctl_mvldx_m1.d[i] & ~m5k.f .ctl._ctl_mvldx_m1.q[i] & !m5k.f .ctl._ctl_mvldx_m1.cond & ((m5k.f .ctl.alive & m5k.f .ctl.alive_m1))} report "fondNoRise: m5kc_fcl._ctl_mvldx_m1"; 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
       psl cover { ~m5k.f .ctl._ctl_mvldx_m1.d[i] &  m5k.f .ctl._ctl_mvldx_m1.q[i] & !m5k.f .ctl._ctl_mvldx_m1.cond & ((m5k.f .ctl.alive & m5k.f .ctl.alive_m1))} report "fondNoFall: m5kc_fcl._ctl_mvldx_m1"; 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
    end endgenerate	 
 
-`line 156 "t/t_preproc.v" 0
+`line 159 "t/t_preproc.v" 0
  
  
 module prot();
 `protected
     I!#r#e6<_Q{{E2+]I3<[3s)1@D|'E''i!O?]jD>Jo_![Cl)
     #nj1]p,3^1~,="E@QZB\T)eU\pC#C|7=\$J$##A[@-@{Qk]
-`line 162 "t/t_preproc.v" 0
+`line 165 "t/t_preproc.v" 0
 `endprotected
 endmodule
  
 
-`line 166 "t/t_preproc.v" 0
+`line 169 "t/t_preproc.v" 0
  
  
 module t_lint_pragma_protected;
 
-`line 170 "t/t_preproc.v" 0
+`line 173 "t/t_preproc.v" 0
 `pragma protect begin_protected
 `pragma protect version=1
 `pragma protect encrypt_agent="XXXXX"
@@ -298,7 +302,7 @@ module t_lint_pragma_protected;
 ICAgICAgICAgICAgICAgICAgIEdOVSBMRVNTRVIgR0VORVJBTCBQVUJMSUMgTElDRU5TRQogICAg
 KSAyMDA3IE==
 
-`line 183 "t/t_preproc.v" 0
+`line 186 "t/t_preproc.v" 0
 `pragma protect key_keyowner="BIG3#2"
 `pragma protect key_keyname="BBBBBB"
 `pragma protect key_method="RSA"
@@ -308,7 +312,7 @@ IEV2ZXJ5b25lIGlzIHBlcm1pdHRlZCB0byBjb3B5IGFuZCBkaXN0cmlidXRlIHZlcmJhdGltIGNv
 cGllcwogb2YgdGhpcyBsaWNlbnNlIGRvY3VtZW50LCBidXQgY2hhbmdpbmcgaXQgaXMgbm90IGFs
 bG93ZWQuCgoKICBUaGl=
 
-`line 192 "t/t_preproc.v" 0
+`line 195 "t/t_preproc.v" 0
 `pragma protect key_keyowner="BIG3#3"
 `pragma protect key_keyname="CCCCCCCC"
 `pragma protect key_method="RSA"
@@ -318,7 +322,7 @@ TGljZW5zZSBpbmNvcnBvcmF0ZXMKdGhlIHRlcm1zIGFuZCBjb25kaXRpb25zIG9mIHZlcnNpb24g
 MyBvZiB0aGUgR05VIEdlbmVyYWwgUHVibGljCkxpY2Vuc2UsIHN1cHBsZW1lbnRlZCBieSB0aGUg
 YWRkaXRpb25hbCBwZXJ=
 
-`line 201 "t/t_preproc.v" 0
+`line 204 "t/t_preproc.v" 0
 `pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 295)
 `pragma protect data_block
 aW5pdGlvbnMuCgogIEFzIHVzZWQgaGVyZWluLCAidGhpcyBMaWNlbnNlIiByZWZlcnMgdG8gdmVy
@@ -329,18 +333,18 @@ ZCBieSB0aGlzIExpY2Vuc2UsCm90aGVyIHRoYW4gYW4gQXBwbGljYXRpb24gb3IgYSBDb21iaW5l
 ZCBXb3JrIGFzIG==
 
 
-`line 211 "t/t_preproc.v" 0
+`line 214 "t/t_preproc.v" 0
 `pragma protect end_protected
 
-`line 213 "t/t_preproc.v" 0
+`line 216 "t/t_preproc.v" 0
  
 `pragma protect
 `pragma protect end
 
-`line 217 "t/t_preproc.v" 0
+`line 220 "t/t_preproc.v" 0
 endmodule
 
-`line 219 "t/t_preproc.v" 0
+`line 222 "t/t_preproc.v" 0
  
  
  
@@ -351,17 +355,17 @@ endmodule
  
  
 
-`line 229 "t/t_preproc.v" 0
+`line 232 "t/t_preproc.v" 0
 begin addr <= (({regs[6], regs[7]} + 1)); rd <= 1; end and begin addr <= (({regs[6], regs[7]})); wdata <= (rdata); wr <= 1; end
 begin addr <= ({regs[6], regs[7]} + 1); rd <= 1; end
 begin addr <= ({regs[6], regs[7]}); wdata <= (rdata); wr <= 1; end  more
 
-`line 233 "t/t_preproc.v" 0
- 
- 
- 
- 
 `line 236 "t/t_preproc.v" 0
+ 
+ 
+ 
+ 
+`line 239 "t/t_preproc.v" 0
 `line 1 "t/t_preproc_inc4.vh" 1
  
 `line 2 "t/t_preproc_inc4.vh" 0
@@ -373,57 +377,57 @@ begin addr <= ({regs[6], regs[7]}); wdata <= (rdata); wr <= 1; end  more
  
 
 `line 8 "t/t_preproc_inc4.vh" 0
-`line 236 "t/t_preproc.v" 2
-
-`line 237 "t/t_preproc.v" 0
- 
-  
+`line 239 "t/t_preproc.v" 2
 
 `line 240 "t/t_preproc.v" 0
  
+  
 
-`line 242 "t/t_preproc.v" 0
+`line 243 "t/t_preproc.v" 0
+ 
+
+`line 245 "t/t_preproc.v" 0
  
   
 
 
-`line 246 "t/t_preproc.v" 0
+`line 249 "t/t_preproc.v" 0
  
  
 
-`line 249 "t/t_preproc.v" 0
+`line 252 "t/t_preproc.v" 0
  
 $blah("ab,cd","e,f");
 $blah(this.logfile,vec);
 $blah(this.logfile,vec[1,2,3]);
 $blah(this.logfile,{blah.name(), " is not foo"});
 
-`line 255 "t/t_preproc.v" 0
+`line 258 "t/t_preproc.v" 0
  
  
 
-`line 258 "t/t_preproc.v" 0
+`line 261 "t/t_preproc.v" 0
 `pragma foo = 1
 `default_nettype none
 `default_nettype uwire
 
-`line 262 "t/t_preproc.v" 0
+`line 265 "t/t_preproc.v" 0
  
  
 
-`line 265 "t/t_preproc.v" 0
+`line 268 "t/t_preproc.v" 0
  
  
    
 
-`line 269 "t/t_preproc.v" 0
-Line_Preproc_Check 269
-
-`line 271 "t/t_preproc.v" 0
- 
- 
+`line 272 "t/t_preproc.v" 0
+Line_Preproc_Check 272
 
 `line 274 "t/t_preproc.v" 0
+ 
+ 
+
+`line 277 "t/t_preproc.v" 0
     
 
 
@@ -431,34 +435,34 @@ Line_Preproc_Check 269
 
 
 
-`line 281 "t/t_preproc.v" 0
-(x,y)
-Line_Preproc_Check 282
-
 `line 284 "t/t_preproc.v" 0
- 
- 
+(x,y)
+Line_Preproc_Check 285
 
 `line 287 "t/t_preproc.v" 0
  
  
+
+`line 290 "t/t_preproc.v" 0
+ 
+ 
  
  
 beginend    
 beginend     
 "beginend"   
 
-`line 295 "t/t_preproc.v" 0
+`line 298 "t/t_preproc.v" 0
  
  
  
  
   `\esc`def
 
-`line 301 "t/t_preproc.v" 0
+`line 304 "t/t_preproc.v" 0
 Not a \`define
 
-`line 303 "t/t_preproc.v" 0
+`line 306 "t/t_preproc.v" 0
  
  
  
@@ -467,23 +471,23 @@ Not a \`define
  
 x,y)--bee  submacro has comma paren
 
-`line 311 "t/t_preproc.v" 0
+`line 314 "t/t_preproc.v" 0
  
  
  
 $display("bits %d %d", $bits(foo), 10);
 
-`line 316 "t/t_preproc.v" 0
+`line 319 "t/t_preproc.v" 0
  
  
  
     
 
-`line 321 "t/t_preproc.v" 0
-    
-    
-
 `line 324 "t/t_preproc.v" 0
+    
+    
+
+`line 327 "t/t_preproc.v" 0
  
  
  
@@ -498,30 +502,30 @@ $display("bits %d %d", $bits(foo), 10);
 
 
 
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
 
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
    							
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
          	
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
       
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
 					
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
   								
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
      					
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
           		
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
     							
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
      assign a3 = ~b3 ;						
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
   
 
-`line 340 "t/t_preproc.v" 0
+`line 343 "t/t_preproc.v" 0
  
  	\
  
@@ -532,56 +536,56 @@ $display("bits %d %d", $bits(foo), 10);
 
 
 
-`line 349 "t/t_preproc.v" 0
+`line 352 "t/t_preproc.v" 0
    
-`line 349 "t/t_preproc.v" 0
+`line 352 "t/t_preproc.v" 0
  		
-`line 349 "t/t_preproc.v" 0
+`line 352 "t/t_preproc.v" 0
    def i		
 
 
-`line 351 "t/t_preproc.v" 0
+`line 354 "t/t_preproc.v" 0
  
 
-`line 353 "t/t_preproc.v" 0
+`line 356 "t/t_preproc.v" 0
  
  
  
 
 
-`line 357 "t/t_preproc.v" 0
+`line 360 "t/t_preproc.v" 0
  
 
  
 
 
 
-`line 363 "t/t_preproc.v" 0
+`line 366 "t/t_preproc.v" 0
 1 /*verilator NOT IN DEFINE*/  (nodef)
 2 /*verilator PART OF DEFINE*/  (hasdef)
 3 
-`line 365 "t/t_preproc.v" 0
+`line 368 "t/t_preproc.v" 0
 /*verilator NOT PART
  OF DEFINE*/  (nodef)
-`line 366 "t/t_preproc.v" 0
+`line 369 "t/t_preproc.v" 0
 4 
-`line 366 "t/t_preproc.v" 0
+`line 369 "t/t_preproc.v" 0
 /*verilator PART 
  OF DEFINE*/  (nodef)
-`line 367 "t/t_preproc.v" 0
+`line 370 "t/t_preproc.v" 0
 5 also in  
-`line 367 "t/t_preproc.v" 0
+`line 370 "t/t_preproc.v" 0
   also3 (nodef)
  
 
 HAS a NEW 
-`line 370 "t/t_preproc.v" 0
+`line 373 "t/t_preproc.v" 0
 LINE
 
-`line 372 "t/t_preproc.v" 0
+`line 375 "t/t_preproc.v" 0
  
 
-`line 374 "t/t_preproc.v" 0
+`line 377 "t/t_preproc.v" 0
  
 
 
@@ -595,11 +599,11 @@ LINE
 
 
 
-`line 387 "t/t_preproc.v" 0
- 
- 
-
 `line 390 "t/t_preproc.v" 0
+ 
+ 
+
+`line 393 "t/t_preproc.v" 0
 EXP: clxx_scen
 clxx_scen
 EXP: clxx_scen
@@ -607,44 +611,44 @@ EXP: clxx_scen
  
 EXP: do if (start("verilog/inc1.v", 25)) begin  message({"Blah-", "clx_scen", " end"}); end  while(0);
 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
    do 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
         
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
   
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
     
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
  
-`line 396 "t/t_preproc.v" 0
-      if (start("t/t_preproc.v", 396)) begin 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
+      if (start("t/t_preproc.v", 399)) begin 
+`line 399 "t/t_preproc.v" 0
  
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
 	 message({"Blah-", "clx_scen", " end"}); 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
       end 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
         
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
    while(0);
 
-`line 398 "t/t_preproc.v" 0
+`line 401 "t/t_preproc.v" 0
  
 
-`line 400 "t/t_preproc.v" 0
+`line 403 "t/t_preproc.v" 0
  
 
 
 
 
-`line 404 "t/t_preproc.v" 0
+`line 407 "t/t_preproc.v" 0
     
-`line 404 "t/t_preproc.v" 0
+`line 407 "t/t_preproc.v" 0
     
 
-`line 405 "t/t_preproc.v" 0
+`line 408 "t/t_preproc.v" 0
      
  
 EXP: This is fooed
@@ -652,7 +656,7 @@ This is fooed
 EXP: This is fooed_2
 This is fooed_2
 
-`line 412 "t/t_preproc.v" 0
+`line 415 "t/t_preproc.v" 0
  
  
 np
@@ -664,12 +668,12 @@ np
  
     
 
-`line 423 "t/t_preproc.v" 0
- 
-    
-
 `line 426 "t/t_preproc.v" 0
  
+    
+
+`line 429 "t/t_preproc.v" 0
+ 
  
  
  
@@ -677,12 +681,12 @@ np
  
  
 
-`line 434 "t/t_preproc.v" 0
+`line 437 "t/t_preproc.v" 0
  
  
  
 
-`line 438 "t/t_preproc.v" 0
+`line 441 "t/t_preproc.v" 0
 hello3hello3hello3
 hello4hello4hello4hello4
  
@@ -690,7 +694,7 @@ hello4hello4hello4hello4
  
  
  
-`line 444 "t/t_preproc.v" 0
+`line 447 "t/t_preproc.v" 0
 `line 1 "t/t_preproc_inc4.vh" 1
  
 `line 2 "t/t_preproc_inc4.vh" 0
@@ -702,9 +706,9 @@ hello4hello4hello4hello4
  
 
 `line 8 "t/t_preproc_inc4.vh" 0
-`line 444 "t/t_preproc.v" 2
+`line 447 "t/t_preproc.v" 2
 
-`line 445 "t/t_preproc.v" 0
+`line 448 "t/t_preproc.v" 0
    
  
  
@@ -714,28 +718,28 @@ hello4hello4hello4hello4
  
  
      
-`line 453 "t/t_preproc.v" 0
+`line 456 "t/t_preproc.v" 0
  
      
      
      
-Line_Preproc_Check 457
+Line_Preproc_Check 460
  
  
  
 
  
-Line_Preproc_Check 463
+Line_Preproc_Check 466
 "FOO \
   BAR " "arg_line1 \
   arg_line2" "FOO \
   BAR "
-`line 466 "t/t_preproc.v" 0
-Line_Preproc_Check 466
+`line 469 "t/t_preproc.v" 0
+Line_Preproc_Check 469
  
  
 
-`line 470 "t/t_preproc.v" 0
+`line 473 "t/t_preproc.v" 0
  
  
  
@@ -746,14 +750,14 @@ abc
  
  
 
-`line 480 "t/t_preproc.v" 0
+`line 483 "t/t_preproc.v" 0
  
  
  
 EXP: sonet_frame
 sonet_frame
 
-`line 486 "t/t_preproc.v" 0
+`line 489 "t/t_preproc.v" 0
  
  
 EXP: sonet_frame
@@ -764,7 +768,7 @@ sonet_frame
 EXP: sonet_frame
 sonet_frame
 
-`line 496 "t/t_preproc.v" 0
+`line 499 "t/t_preproc.v" 0
  
  
  
@@ -772,13 +776,13 @@ EXP: module zzz ; endmodule
 module zzz ; endmodule
 module zzz ; endmodule
 
-`line 503 "t/t_preproc.v" 0
+`line 506 "t/t_preproc.v" 0
  
 EXP: module a_b ; endmodule
 module a_b ; endmodule
 module a_b ; endmodule
 
-`line 508 "t/t_preproc.v" 0
+`line 511 "t/t_preproc.v" 0
  
  
 integer foo;
@@ -792,7 +796,7 @@ module t;
  
 
    initial begin : \`LEX_CAT(a[0],_assignment)  
-`line 520 "t/t_preproc.v" 0
+`line 523 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\`LEX_CAT(a[0],_assignment) ");   end
     
     
@@ -801,7 +805,7 @@ module t;
  
 
    initial begin : \a[0]_assignment_a[1] 
-`line 527 "t/t_preproc.v" 0
+`line 530 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\a[0]_assignment_a[1] ");   end
  
     
@@ -817,7 +821,7 @@ module t;
 
     
    initial begin : \`CAT(ff,bb) 
-`line 541 "t/t_preproc.v" 0
+`line 544 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\`CAT(ff,bb) ");   end
    
     
@@ -825,7 +829,7 @@ module t;
 
     
    initial begin : \`zzz 
-`line 547 "t/t_preproc.v" 0
+`line 550 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\`zzz ");   end
  
     
@@ -834,11 +838,11 @@ module t;
 
     
    initial begin : \`FOO 
-`line 554 "t/t_preproc.v" 0
+`line 557 "t/t_preproc.v" 0
     $write("GOT%%m='%m' OTHER_EXP='%s'\n OUR_EXP='%s'", "t.bar ","t.\\`FOO ");  end
     
    initial begin : \xx`FOO 
-`line 556 "t/t_preproc.v" 0
+`line 559 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\xx`FOO ");  end
    
     
@@ -871,27 +875,27 @@ module t;
  
 
    initial 
-`line 587 "t/t_preproc.v" 0
+`line 590 "t/t_preproc.v" 0
        $display("%s%s","a1","b2c3\n");
 endmodule
 
-`line 590 "t/t_preproc.v" 0
+`line 593 "t/t_preproc.v" 0
  
  
 
-`line 593 "t/t_preproc.v" 0
+`line 596 "t/t_preproc.v" 0
  
  
 $display("RAM0");
 $display("CPU");
 
-`line 598 "t/t_preproc.v" 0
+`line 601 "t/t_preproc.v" 0
  
  
  
  
 
-`line 603 "t/t_preproc.v" 0
+`line 606 "t/t_preproc.v" 0
  
 XXE_FAMILY = XXE_
  
@@ -899,7 +903,7 @@ XXE_FAMILY = XXE_
      $display("XXE_ is defined");
 
 
-`line 610 "t/t_preproc.v" 0
+`line 613 "t/t_preproc.v" 0
  
 XYE_FAMILY = XYE_
  
@@ -907,7 +911,7 @@ XYE_FAMILY = XYE_
      $display("XYE_ is defined");
 
 
-`line 617 "t/t_preproc.v" 0
+`line 620 "t/t_preproc.v" 0
  
 XXS_FAMILY = XXS_some
  
@@ -915,7 +919,7 @@ XXS_FAMILY = XXS_some
      $display("XXS_some is defined");
 
 
-`line 624 "t/t_preproc.v" 0
+`line 627 "t/t_preproc.v" 0
  
 XYS_FAMILY = XYS_foo
  
@@ -923,10 +927,10 @@ XYS_FAMILY = XYS_foo
      $display("XYS_foo is defined");
 
 
-`line 631 "t/t_preproc.v" 0
+`line 634 "t/t_preproc.v" 0
  
 
-`line 633 "t/t_preproc.v" 0
+`line 636 "t/t_preproc.v" 0
  
   
   
@@ -935,7 +939,7 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 641 "t/t_preproc.v" 0
+`line 644 "t/t_preproc.v" 0
   
   
   
@@ -943,7 +947,7 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 648 "t/t_preproc.v" 0
+`line 651 "t/t_preproc.v" 0
   
   
   
@@ -951,7 +955,7 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 655 "t/t_preproc.v" 0
+`line 658 "t/t_preproc.v" 0
   
   
   
@@ -959,27 +963,27 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 662 "t/t_preproc.v" 0
+`line 665 "t/t_preproc.v" 0
   
 
-`line 664 "t/t_preproc.v" 0
+`line 667 "t/t_preproc.v" 0
   
 
-`line 666 "t/t_preproc.v" 0
+`line 669 "t/t_preproc.v" 0
  
  
 (.mySig (myInterface.pa5),
 
-`line 670 "t/t_preproc.v" 0
- 
- 
-
 `line 673 "t/t_preproc.v" 0
  
-`dbg_hdl(UVM_LOW, ("Functional coverage enabled: paramgrp"));
+ 
 
 `line 676 "t/t_preproc.v" 0
  
+`dbg_hdl(UVM_LOW, ("Functional coverage enabled: paramgrp"));
+
+`line 679 "t/t_preproc.v" 0
+ 
  
 
  
@@ -987,28 +991,28 @@ XYS_FAMILY = XYS_foo
 
 
 
-`line 684 "t/t_preproc.v" 0
+`line 687 "t/t_preproc.v" 0
 module pcc2_cfg;
   generate
    
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
   covergroup a @(posedge b); 
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
     c: coverpoint d iff ((c) === 1'b1); endgroup 
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
       a u_a; 
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
    initial do begin $display ("DEBUG : %s [%m]", $sformatf ("Functional coverage enabled: u_a")); end while(0);
   endgenerate
 endmodule
 
-`line 690 "t/t_preproc.v" 0
+`line 693 "t/t_preproc.v" 0
  
  
  
 "`NOT_DEFINED_STR"
 
-`line 695 "t/t_preproc.v" 0
+`line 698 "t/t_preproc.v" 0
  
 
 """First line with "quoted"\nSecond line\
@@ -1016,28 +1020,28 @@ Third line"""
 """First line
 Second line"""
 
-`line 702 "t/t_preproc.v" 0
+`line 705 "t/t_preproc.v" 0
  
  
 """QQQ defform"""
 """QQQ defval"""
 
-`line 707 "t/t_preproc.v" 0
+`line 710 "t/t_preproc.v" 0
  
  
 "string argument"
 
-`line 711 "t/t_preproc.v" 0
+`line 714 "t/t_preproc.v" 0
  
  
 
-`line 714 "t/t_preproc.v" 0
+`line 717 "t/t_preproc.v" 0
  
 bar "foo foo foo" bar
  
 bar """foo foo foo""" bar
 
-`line 719 "t/t_preproc.v" 0
+`line 722 "t/t_preproc.v" 0
  
  
    
@@ -1060,4 +1064,4 @@ predef 2 2
  
  
 
-`line 741 "t/t_preproc.v" 0
+`line 744 "t/t_preproc.v" 0
diff --git a/test_regress/t/t_preproc.v b/test_regress/t/t_preproc.v
index 0659316ad..32418a196 100644
--- a/test_regress/t/t_preproc.v
+++ b/test_regress/t/t_preproc.v
@@ -83,6 +83,9 @@ $display(`msg(left side, right side))
 `define foo(f) f``_suffix
 `foo(bar)  more
 
+`define with_space_before_suffix(f) f`` suffix_after_space
+`with_space_before_suffix(arg)
+
 `define zap(which)   \
 	$c("Zap(\"",which,"\");");
 `zap(bug1);
diff --git a/test_regress/t/t_preproc_comments.out b/test_regress/t/t_preproc_comments.out
index 4c6cf38bb..044276928 100644
--- a/test_regress/t/t_preproc_comments.out
+++ b/test_regress/t/t_preproc_comments.out
@@ -164,23 +164,27 @@ bar_suffix  more
 
 `line 86 "t/t_preproc.v" 0
  
-
-
-`line 88 "t/t_preproc.v" 0
-	$c("Zap(\"",bug1,"\");");;
+arg suffix_after_space
 
 `line 89 "t/t_preproc.v" 0
-	$c("Zap(\"","bug2","\");");;
+ 
+
 
 `line 91 "t/t_preproc.v" 0
+	$c("Zap(\"",bug1,"\");");;
+
+`line 92 "t/t_preproc.v" 0
+	$c("Zap(\"","bug2","\");");;
+
+`line 94 "t/t_preproc.v" 0
 /* Define inside comment: `DEEPER and `WITHTICK */ 
 // More commentary: `zap(bug1); `zap("bug2"); 
 
-`line 94 "t/t_preproc.v" 0
+`line 97 "t/t_preproc.v" 0
 //====================================================================== 
 // display passthru 
 
-`line 97 "t/t_preproc.v" 0
+`line 100 "t/t_preproc.v" 0
  
  
  
@@ -202,7 +206,7 @@ bar_suffix  more
       $display("left side: \"right side\"");
       $display("standalone");
 
-`line 118 "t/t_preproc.v" 0
+`line 121 "t/t_preproc.v" 0
       // Unspecified when the stringification has multiple lines 
  
 
@@ -213,78 +217,78 @@ bar_suffix  more
    end
 endmodule
 
-`line 128 "t/t_preproc.v" 0
+`line 131 "t/t_preproc.v" 0
 //====================================================================== 
 // rt.cpan.org bug34429 
 
-`line 131 "t/t_preproc.v" 0
+`line 134 "t/t_preproc.v" 0
  
 
 
 
 
-`line 136 "t/t_preproc.v" 0
+`line 139 "t/t_preproc.v" 0
 module add1 ( input wire d1, output wire o1);
  
-`line 137 "t/t_preproc.v" 0
+`line 140 "t/t_preproc.v" 0
 wire  tmp_d1 = d1; 
-`line 137 "t/t_preproc.v" 0
+`line 140 "t/t_preproc.v" 0
 wire  tmp_o1 = tmp_d1 + 1; 
-`line 137 "t/t_preproc.v" 0
+`line 140 "t/t_preproc.v" 0
 assign o1 = tmp_o1 ;   // expansion is OK 
 endmodule
 module add2 ( input wire d2, output wire o2);
  
-`line 140 "t/t_preproc.v" 0
+`line 143 "t/t_preproc.v" 0
 wire  tmp_d2 = d2; 
-`line 140 "t/t_preproc.v" 0
+`line 143 "t/t_preproc.v" 0
 wire  tmp_o2 = tmp_d2 + 1; 
-`line 140 "t/t_preproc.v" 0
+`line 143 "t/t_preproc.v" 0
 assign o2 = tmp_o2 ;  // expansion is bad 
 endmodule
 
-`line 143 "t/t_preproc.v" 0
+`line 146 "t/t_preproc.v" 0
   
 
 
 
 
 
-`line 149 "t/t_preproc.v" 0
+`line 152 "t/t_preproc.v" 0
 // parameterized macro with arguments that are macros 
   
   
   
 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
    
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
    generate for (i=0; i<(3); i=i+1) begin 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
       psl cover {  m5k.f .ctl._ctl_mvldx_m1.d[i] & ~m5k.f .ctl._ctl_mvldx_m1.q[i] & !m5k.f .ctl._ctl_mvldx_m1.cond & ((m5k.f .ctl.alive & m5k.f .ctl.alive_m1))} report "fondNoRise: m5kc_fcl._ctl_mvldx_m1"; 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
       psl cover { ~m5k.f .ctl._ctl_mvldx_m1.d[i] &  m5k.f .ctl._ctl_mvldx_m1.q[i] & !m5k.f .ctl._ctl_mvldx_m1.cond & ((m5k.f .ctl.alive & m5k.f .ctl.alive_m1))} report "fondNoFall: m5kc_fcl._ctl_mvldx_m1"; 
-`line 154 "t/t_preproc.v" 0
+`line 157 "t/t_preproc.v" 0
    end endgenerate	// ignorecmt 
 
-`line 156 "t/t_preproc.v" 0
+`line 159 "t/t_preproc.v" 0
 //====================================================================== 
 // Quotes are legal in protected blocks.  Grr. 
 module prot();
 `protected
     I!#r#e6<_Q{{E2+]I3<[3s)1@D|'E''i!O?]jD>Jo_![Cl)
     #nj1]p,3^1~,="E@QZB\T)eU\pC#C|7=\$J$##A[@-@{Qk]
-`line 162 "t/t_preproc.v" 0
+`line 165 "t/t_preproc.v" 0
 `endprotected
 endmodule
 //" 
 
-`line 166 "t/t_preproc.v" 0
+`line 169 "t/t_preproc.v" 0
 //====================================================================== 
 // Check IEEE 1800-2017 `pragma protect encrypted modules 
 module t_lint_pragma_protected;
 
-`line 170 "t/t_preproc.v" 0
+`line 173 "t/t_preproc.v" 0
 `pragma protect begin_protected
 `pragma protect version=1
 `pragma protect encrypt_agent="XXXXX"
@@ -298,7 +302,7 @@ module t_lint_pragma_protected;
 ICAgICAgICAgICAgICAgICAgIEdOVSBMRVNTRVIgR0VORVJBTCBQVUJMSUMgTElDRU5TRQogICAg
 KSAyMDA3IE==
 
-`line 183 "t/t_preproc.v" 0
+`line 186 "t/t_preproc.v" 0
 `pragma protect key_keyowner="BIG3#2"
 `pragma protect key_keyname="BBBBBB"
 `pragma protect key_method="RSA"
@@ -308,7 +312,7 @@ IEV2ZXJ5b25lIGlzIHBlcm1pdHRlZCB0byBjb3B5IGFuZCBkaXN0cmlidXRlIHZlcmJhdGltIGNv
 cGllcwogb2YgdGhpcyBsaWNlbnNlIGRvY3VtZW50LCBidXQgY2hhbmdpbmcgaXQgaXMgbm90IGFs
 bG93ZWQuCgoKICBUaGl=
 
-`line 192 "t/t_preproc.v" 0
+`line 195 "t/t_preproc.v" 0
 `pragma protect key_keyowner="BIG3#3"
 `pragma protect key_keyname="CCCCCCCC"
 `pragma protect key_method="RSA"
@@ -318,7 +322,7 @@ TGljZW5zZSBpbmNvcnBvcmF0ZXMKdGhlIHRlcm1zIGFuZCBjb25kaXRpb25zIG9mIHZlcnNpb24g
 MyBvZiB0aGUgR05VIEdlbmVyYWwgUHVibGljCkxpY2Vuc2UsIHN1cHBsZW1lbnRlZCBieSB0aGUg
 YWRkaXRpb25hbCBwZXJ=
 
-`line 201 "t/t_preproc.v" 0
+`line 204 "t/t_preproc.v" 0
 `pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 295)
 `pragma protect data_block
 aW5pdGlvbnMuCgogIEFzIHVzZWQgaGVyZWluLCAidGhpcyBMaWNlbnNlIiByZWZlcnMgdG8gdmVy
@@ -329,18 +333,18 @@ ZCBieSB0aGlzIExpY2Vuc2UsCm90aGVyIHRoYW4gYW4gQXBwbGljYXRpb24gb3IgYSBDb21iaW5l
 ZCBXb3JrIGFzIG==
 
 
-`line 211 "t/t_preproc.v" 0
+`line 214 "t/t_preproc.v" 0
 `pragma protect end_protected
 
-`line 213 "t/t_preproc.v" 0
+`line 216 "t/t_preproc.v" 0
 // encoding envelope 
 `pragma protect
 `pragma protect end
 
-`line 217 "t/t_preproc.v" 0
+`line 220 "t/t_preproc.v" 0
 endmodule
 
-`line 219 "t/t_preproc.v" 0
+`line 222 "t/t_preproc.v" 0
 //====================================================================== 
 // macro call with define that has comma 
  
@@ -351,17 +355,17 @@ endmodule
  
  
 
-`line 229 "t/t_preproc.v" 0
+`line 232 "t/t_preproc.v" 0
 begin addr <= (({regs[6], regs[7]} + 1)); rd <= 1; end and begin addr <= (({regs[6], regs[7]})); wdata <= (rdata); wr <= 1; end
 begin addr <= ({regs[6], regs[7]} + 1); rd <= 1; end
 begin addr <= ({regs[6], regs[7]}); wdata <= (rdata); wr <= 1; end  more
 
-`line 233 "t/t_preproc.v" 0
+`line 236 "t/t_preproc.v" 0
 //====================================================================== 
 // include of parameterized file 
  
  
-`line 236 "t/t_preproc.v" 0
+`line 239 "t/t_preproc.v" 0
 `line 1 "t/t_preproc_inc4.vh" 1
 // DESCRIPTION: Verilog::Preproc: Example source code 
 `line 2 "t/t_preproc_inc4.vh" 0
@@ -373,57 +377,57 @@ begin addr <= ({regs[6], regs[7]}); wdata <= (rdata); wr <= 1; end  more
  
 
 `line 8 "t/t_preproc_inc4.vh" 0
-`line 236 "t/t_preproc.v" 2
-
-`line 237 "t/t_preproc.v" 0
- 
-  
+`line 239 "t/t_preproc.v" 2
 
 `line 240 "t/t_preproc.v" 0
  
+  
 
-`line 242 "t/t_preproc.v" 0
+`line 243 "t/t_preproc.v" 0
+ 
+
+`line 245 "t/t_preproc.v" 0
  
   
 
 
-`line 246 "t/t_preproc.v" 0
+`line 249 "t/t_preproc.v" 0
 //====================================================================== 
 // macro call with , in {} 
 
-`line 249 "t/t_preproc.v" 0
+`line 252 "t/t_preproc.v" 0
  
 $blah("ab,cd","e,f");
 $blah(this.logfile,vec);
 $blah(this.logfile,vec[1,2,3]);
 $blah(this.logfile,{blah.name(), " is not foo"});
 
-`line 255 "t/t_preproc.v" 0
+`line 258 "t/t_preproc.v" 0
 //====================================================================== 
 // pragma/default net type 
 
-`line 258 "t/t_preproc.v" 0
+`line 261 "t/t_preproc.v" 0
 `pragma foo = 1
 `default_nettype none
 `default_nettype uwire
 
-`line 262 "t/t_preproc.v" 0
+`line 265 "t/t_preproc.v" 0
 //====================================================================== 
 // Ifdef 
 
-`line 265 "t/t_preproc.v" 0
+`line 268 "t/t_preproc.v" 0
  
  
    
 
-`line 269 "t/t_preproc.v" 0
-Line_Preproc_Check 269
+`line 272 "t/t_preproc.v" 0
+Line_Preproc_Check 272
 
-`line 271 "t/t_preproc.v" 0
+`line 274 "t/t_preproc.v" 0
 //====================================================================== 
 // bug84 
 
-`line 274 "t/t_preproc.v" 0
+`line 277 "t/t_preproc.v" 0
  // Hello, comments MIGHT not be legal /*more,,)cmts*/ // But newlines ARE legal... who speced THAT? 
 
 
@@ -431,15 +435,15 @@ Line_Preproc_Check 269
 
 
 
-`line 281 "t/t_preproc.v" 0
-(//Here 	      x,y   //Too) 
-Line_Preproc_Check 282
-
 `line 284 "t/t_preproc.v" 0
+(//Here 	      x,y   //Too) 
+Line_Preproc_Check 285
+
+`line 287 "t/t_preproc.v" 0
 //====================================================================== 
 // defines split arguments 
 
-`line 287 "t/t_preproc.v" 0
+`line 290 "t/t_preproc.v" 0
  
  
  
@@ -448,17 +452,17 @@ beginend   // 2001 spec doesn't require two tokens, so "beginend" ok
 beginend    // 2001 spec doesn't require two tokens, so "beginend" ok 
 "beginend"  // No space "beginend" 
 
-`line 295 "t/t_preproc.v" 0
+`line 298 "t/t_preproc.v" 0
 //====================================================================== 
 // bug106 
  
  
   `\esc`def
 
-`line 301 "t/t_preproc.v" 0
+`line 304 "t/t_preproc.v" 0
 Not a \`define
 
-`line 303 "t/t_preproc.v" 0
+`line 306 "t/t_preproc.v" 0
 //====================================================================== 
 // misparsed comma in submacro 
  
@@ -467,23 +471,23 @@ Not a \`define
  
 x,y)--bee  submacro has comma paren
 
-`line 311 "t/t_preproc.v" 0
+`line 314 "t/t_preproc.v" 0
 //====================================================================== 
 // bug191 
  
 $display("bits %d %d", $bits(foo), 10);
 
-`line 316 "t/t_preproc.v" 0
+`line 319 "t/t_preproc.v" 0
 //====================================================================== 
 // 1800-2009 
  
     
 
-`line 321 "t/t_preproc.v" 0
+`line 324 "t/t_preproc.v" 0
     
     
 
-`line 324 "t/t_preproc.v" 0
+`line 327 "t/t_preproc.v" 0
 //====================================================================== 
 // bug202 
  
@@ -498,34 +502,34 @@ $display("bits %d %d", $bits(foo), 10);
 
 
 
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
 
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
    							
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
          	
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
       
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
 					
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
   								
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
      					
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
           		
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
     							
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
      assign a3 = ~b3 ;						
-`line 338 "t/t_preproc.v" 0
+`line 341 "t/t_preproc.v" 0
   
 
-`line 340 "t/t_preproc.v" 0
+`line 343 "t/t_preproc.v" 0
  
 /* multi	\
 	 line1*/ 	\
-`line 342 "t/t_preproc.v" 0
+`line 345 "t/t_preproc.v" 0
  
 /*multi	\
 	   line2*/ 
@@ -534,59 +538,59 @@ $display("bits %d %d", $bits(foo), 10);
 
 
 
-`line 349 "t/t_preproc.v" 0
+`line 352 "t/t_preproc.v" 0
 
-`line 349 "t/t_preproc.v" 0
+`line 352 "t/t_preproc.v" 0
    
-`line 349 "t/t_preproc.v" 0
+`line 352 "t/t_preproc.v" 0
 /* multi		
       line 3*/ 		
-`line 349 "t/t_preproc.v" 0
+`line 352 "t/t_preproc.v" 0
    def i		
 
 
-`line 351 "t/t_preproc.v" 0
+`line 354 "t/t_preproc.v" 0
 //====================================================================== 
 
-`line 353 "t/t_preproc.v" 0
+`line 356 "t/t_preproc.v" 0
  
  
  
 
 
-`line 357 "t/t_preproc.v" 0
+`line 360 "t/t_preproc.v" 0
  
 
  
 
 
 
-`line 363 "t/t_preproc.v" 0
+`line 366 "t/t_preproc.v" 0
 1 // verilator NOT IN DEFINE (nodef) 
 2 /* verilator PART OF DEFINE */  (hasdef)
 3 
-`line 365 "t/t_preproc.v" 0
+`line 368 "t/t_preproc.v" 0
 /* verilator NOT PART
 	        OF DEFINE */  (nodef)
-`line 366 "t/t_preproc.v" 0
+`line 369 "t/t_preproc.v" 0
 4 
-`line 366 "t/t_preproc.v" 0
+`line 369 "t/t_preproc.v" 0
 /* verilator PART 
 	        OF DEFINE */  (nodef)
-`line 367 "t/t_preproc.v" 0
+`line 370 "t/t_preproc.v" 0
 5 also in  
-`line 367 "t/t_preproc.v" 0
+`line 370 "t/t_preproc.v" 0
   also3  // CMT NOT (nodef) 
  
 
 HAS a NEW 
-`line 370 "t/t_preproc.v" 0
+`line 373 "t/t_preproc.v" 0
 LINE
 
-`line 372 "t/t_preproc.v" 0
+`line 375 "t/t_preproc.v" 0
 //====================================================================== 
 
-`line 374 "t/t_preproc.v" 0
+`line 377 "t/t_preproc.v" 0
  
 
 
@@ -600,11 +604,11 @@ LINE
 
 
 
-`line 387 "t/t_preproc.v" 0
- 
- 
-
 `line 390 "t/t_preproc.v" 0
+ 
+ 
+
+`line 393 "t/t_preproc.v" 0
 EXP: clxx_scen
 clxx_scen
 EXP: clxx_scen
@@ -612,44 +616,44 @@ EXP: clxx_scen
  
 EXP: do if (start("verilog/inc1.v", 25)) begin  message({"Blah-", "clx_scen", " end"}); end  while(0);
 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
    do 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
       /* synopsys translate_off */  
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
   
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
     
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
  
-`line 396 "t/t_preproc.v" 0
-      if (start("t/t_preproc.v", 396)) begin 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
+      if (start("t/t_preproc.v", 399)) begin 
+`line 399 "t/t_preproc.v" 0
  
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
 	 message({"Blah-", "clx_scen", " end"}); 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
       end 
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
       /* synopsys translate_on */  
-`line 396 "t/t_preproc.v" 0
+`line 399 "t/t_preproc.v" 0
    while(0);
 
-`line 398 "t/t_preproc.v" 0
+`line 401 "t/t_preproc.v" 0
 //====================================================================== 
 
-`line 400 "t/t_preproc.v" 0
+`line 403 "t/t_preproc.v" 0
  
 
 
 
 
-`line 404 "t/t_preproc.v" 0
+`line 407 "t/t_preproc.v" 0
     
-`line 404 "t/t_preproc.v" 0
+`line 407 "t/t_preproc.v" 0
     
 
-`line 405 "t/t_preproc.v" 0
+`line 408 "t/t_preproc.v" 0
      
 //`ifndef def_fooed_2  `error "No def_fooed_2" `endif 
 EXP: This is fooed
@@ -657,7 +661,7 @@ This is fooed
 EXP: This is fooed_2
 This is fooed_2
 
-`line 412 "t/t_preproc.v" 0
+`line 415 "t/t_preproc.v" 0
 //====================================================================== 
  
 np
@@ -669,11 +673,11 @@ np
  
     
 
-`line 423 "t/t_preproc.v" 0
+`line 426 "t/t_preproc.v" 0
  
     
 
-`line 426 "t/t_preproc.v" 0
+`line 429 "t/t_preproc.v" 0
 //====================================================================== 
 // Metaprogramming 
  
@@ -682,12 +686,12 @@ np
  
  
 
-`line 434 "t/t_preproc.v" 0
+`line 437 "t/t_preproc.v" 0
  
  
  
 
-`line 438 "t/t_preproc.v" 0
+`line 441 "t/t_preproc.v" 0
 hello3hello3hello3
 hello4hello4hello4hello4
 //====================================================================== 
@@ -695,7 +699,7 @@ hello4hello4hello4hello4
  
  
  
-`line 444 "t/t_preproc.v" 0
+`line 447 "t/t_preproc.v" 0
 `line 1 "t/t_preproc_inc4.vh" 1
 // DESCRIPTION: Verilog::Preproc: Example source code 
 `line 2 "t/t_preproc_inc4.vh" 0
@@ -707,9 +711,9 @@ hello4hello4hello4hello4
  
 
 `line 8 "t/t_preproc_inc4.vh" 0
-`line 444 "t/t_preproc.v" 2
+`line 447 "t/t_preproc.v" 2
 
-`line 445 "t/t_preproc.v" 0
+`line 448 "t/t_preproc.v" 0
    
 //====================================================================== 
 // Defines doing defines 
@@ -719,28 +723,28 @@ hello4hello4hello4hello4
  
  
      
-`line 453 "t/t_preproc.v" 0
+`line 456 "t/t_preproc.v" 0
  
      
      
      
-Line_Preproc_Check 457
+Line_Preproc_Check 460
 //====================================================================== 
 // Quoted multiline - track line numbers, and ensure \\n gets propagated 
  
 
  
-Line_Preproc_Check 463
+Line_Preproc_Check 466
 "FOO \
   BAR " "arg_line1 \
   arg_line2" "FOO \
   BAR "
-`line 466 "t/t_preproc.v" 0
-Line_Preproc_Check 466
+`line 469 "t/t_preproc.v" 0
+Line_Preproc_Check 469
 //====================================================================== 
 // bug283 
 
-`line 470 "t/t_preproc.v" 0
+`line 473 "t/t_preproc.v" 0
  
  
  
@@ -751,14 +755,14 @@ abc
  
  
 
-`line 480 "t/t_preproc.v" 0
+`line 483 "t/t_preproc.v" 0
  
  
  
 EXP: sonet_frame
 sonet_frame
 
-`line 486 "t/t_preproc.v" 0
+`line 489 "t/t_preproc.v" 0
  
  
 EXP: sonet_frame
@@ -769,7 +773,7 @@ sonet_frame
 EXP: sonet_frame
 sonet_frame
 
-`line 496 "t/t_preproc.v" 0
+`line 499 "t/t_preproc.v" 0
 // The existance of non-existance of a base define can make a difference 
  
  
@@ -777,13 +781,13 @@ EXP: module zzz ; endmodule
 module zzz ; endmodule
 module zzz ; endmodule
 
-`line 503 "t/t_preproc.v" 0
+`line 506 "t/t_preproc.v" 0
  
 EXP: module a_b ; endmodule
 module a_b ; endmodule
 module a_b ; endmodule
 
-`line 508 "t/t_preproc.v" 0
+`line 511 "t/t_preproc.v" 0
 //====================================================================== 
 // bug311 
 integer/*NEED_SPACE*/ foo;
@@ -797,7 +801,7 @@ module t;
  
 
    initial begin : \`LEX_CAT(a[0],_assignment)  
-`line 520 "t/t_preproc.v" 0
+`line 523 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\`LEX_CAT(a[0],_assignment) ");   end
    //----- 
    // SHOULD(simulator-dependant): Backslash doesn't prevent arguments from 
@@ -806,7 +810,7 @@ module t;
  
 
    initial begin : \a[0]_assignment_a[1] 
-`line 527 "t/t_preproc.v" 0
+`line 530 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\a[0]_assignment_a[1] ");   end
  
    //----- 
@@ -822,7 +826,7 @@ module t;
 
    // Similar to above; \ does not allow expansion after substitution 
    initial begin : \`CAT(ff,bb) 
-`line 541 "t/t_preproc.v" 0
+`line 544 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\`CAT(ff,bb) ");   end
    
    //----- 
@@ -830,7 +834,7 @@ module t;
 
    // MUST: Unknown macro with backslash escape stays as escaped symbol name 
    initial begin : \`zzz 
-`line 547 "t/t_preproc.v" 0
+`line 550 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\`zzz ");   end
  
    //----- 
@@ -839,11 +843,11 @@ module t;
 
    // SHOULD(simulator-dependant): Known macro with backslash escape expands 
    initial begin : \`FOO 
-`line 554 "t/t_preproc.v" 0
+`line 557 "t/t_preproc.v" 0
     $write("GOT%%m='%m' OTHER_EXP='%s'\n OUR_EXP='%s'", "t.bar ","t.\\`FOO ");  end
    // SHOULD(simulator-dependant): Prefix breaks the above 
    initial begin : \xx`FOO 
-`line 556 "t/t_preproc.v" 0
+`line 559 "t/t_preproc.v" 0
    $write("GOT%%m='%m' EXP='%s'\n", "t.\\xx`FOO ");  end
    
    //----- 
@@ -876,27 +880,27 @@ module t;
  
 
    initial 
-`line 587 "t/t_preproc.v" 0
+`line 590 "t/t_preproc.v" 0
        $display("%s%s","a1","b2c3\n");
 endmodule
 
-`line 590 "t/t_preproc.v" 0
+`line 593 "t/t_preproc.v" 0
 //====================================================================== 
 //bug1225 
 
-`line 593 "t/t_preproc.v" 0
+`line 596 "t/t_preproc.v" 0
  
  
 $display("RAM0");
 $display("CPU");
 
-`line 598 "t/t_preproc.v" 0
+`line 601 "t/t_preproc.v" 0
  
  
  
  
 
-`line 603 "t/t_preproc.v" 0
+`line 606 "t/t_preproc.v" 0
  
 XXE_FAMILY = XXE_
  
@@ -904,7 +908,7 @@ XXE_FAMILY = XXE_
      $display("XXE_ is defined");
 
 
-`line 610 "t/t_preproc.v" 0
+`line 613 "t/t_preproc.v" 0
  
 XYE_FAMILY = XYE_
  
@@ -912,7 +916,7 @@ XYE_FAMILY = XYE_
      $display("XYE_ is defined");
 
 
-`line 617 "t/t_preproc.v" 0
+`line 620 "t/t_preproc.v" 0
  
 XXS_FAMILY = XXS_some
  
@@ -920,7 +924,7 @@ XXS_FAMILY = XXS_some
      $display("XXS_some is defined");
 
 
-`line 624 "t/t_preproc.v" 0
+`line 627 "t/t_preproc.v" 0
  
 XYS_FAMILY = XYS_foo
  
@@ -928,10 +932,10 @@ XYS_FAMILY = XYS_foo
      $display("XYS_foo is defined");
 
 
-`line 631 "t/t_preproc.v" 0
+`line 634 "t/t_preproc.v" 0
 //==== 
 
-`line 633 "t/t_preproc.v" 0
+`line 636 "t/t_preproc.v" 0
  
   
   
@@ -940,7 +944,7 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 641 "t/t_preproc.v" 0
+`line 644 "t/t_preproc.v" 0
   
   
   
@@ -948,7 +952,7 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 648 "t/t_preproc.v" 0
+`line 651 "t/t_preproc.v" 0
   
   
   
@@ -956,7 +960,7 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 655 "t/t_preproc.v" 0
+`line 658 "t/t_preproc.v" 0
   
   
   
@@ -964,26 +968,26 @@ XYS_FAMILY = XYS_foo
      
  
 
-`line 662 "t/t_preproc.v" 0
+`line 665 "t/t_preproc.v" 0
   
 
-`line 664 "t/t_preproc.v" 0
+`line 667 "t/t_preproc.v" 0
  // NEVER 
 
-`line 666 "t/t_preproc.v" 0
+`line 669 "t/t_preproc.v" 0
 //bug1227 
  
 (.mySig (myInterface.pa5),
 
-`line 670 "t/t_preproc.v" 0
+`line 673 "t/t_preproc.v" 0
 //====================================================================== 
 // Stringify bug 
 
-`line 673 "t/t_preproc.v" 0
+`line 676 "t/t_preproc.v" 0
  
 `dbg_hdl(UVM_LOW, ("Functional coverage enabled: paramgrp"));
 
-`line 676 "t/t_preproc.v" 0
+`line 679 "t/t_preproc.v" 0
  
  
 
@@ -992,28 +996,28 @@ XYS_FAMILY = XYS_foo
 
 
 
-`line 684 "t/t_preproc.v" 0
+`line 687 "t/t_preproc.v" 0
 module pcc2_cfg;
   generate
    
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
   covergroup a @(posedge b); 
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
     c: coverpoint d iff ((c) === 1'b1); endgroup 
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
       a u_a; 
-`line 686 "t/t_preproc.v" 0
+`line 689 "t/t_preproc.v" 0
    initial do begin $display ("DEBUG : %s [%m]", $sformatf ("Functional coverage enabled: u_a")); end while(0);
   endgenerate
 endmodule
 
-`line 690 "t/t_preproc.v" 0
+`line 693 "t/t_preproc.v" 0
 //====================================================================== 
 // Verilog-Perl bug1668 
  
 "`NOT_DEFINED_STR"
 
-`line 695 "t/t_preproc.v" 0
+`line 698 "t/t_preproc.v" 0
 //====================================================================== 
 
 """First line with "quoted"\nSecond line\
@@ -1021,28 +1025,28 @@ Third line"""
 """First line
 Second line"""
 
-`line 702 "t/t_preproc.v" 0
+`line 705 "t/t_preproc.v" 0
  
  
 """QQQ defform"""
 """QQQ defval"""
 
-`line 707 "t/t_preproc.v" 0
+`line 710 "t/t_preproc.v" 0
 // string concat bug 
  
 "string argument"
 
-`line 711 "t/t_preproc.v" 0
+`line 714 "t/t_preproc.v" 0
 //====================================================================== 
 // See issue #5094 - IEEE 1800-2023 clarified proper behavior 
 
-`line 714 "t/t_preproc.v" 0
+`line 717 "t/t_preproc.v" 0
  
 bar "foo foo foo" bar
  
 bar """foo foo foo""" bar
 
-`line 719 "t/t_preproc.v" 0
+`line 722 "t/t_preproc.v" 0
 //====================================================================== 
 // IEEE mandated predefines 
   // undefineall should have no effect on these 
@@ -1065,4 +1069,4 @@ predef 2 2
 // After `undefineall above, for testing --dump-defines 
  
 
-`line 741 "t/t_preproc.v" 0
+`line 744 "t/t_preproc.v" 0