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https://github.com/verilator/verilator.git
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Tests: Fix driver for --iv etc
This commit is contained in:
Wilson Snyder
parent
bdd37e40fe
commit
d52822781c
@ -1343,6 +1343,7 @@ class VlTest:
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'fails': False,
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'run_env': '',
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'tee': True,
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'use_libvpi': False
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}
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param.update(vars(self))
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param.update(kwargs)
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@ -1366,115 +1367,118 @@ class VlTest:
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run_env = run_env + ' '
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if param['atsim']:
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self.run(
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logfile=self.obj_dir + "/atsim_sim.log",
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fails=param['fails'],
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cmd=[
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"echo q | " + run_env + self.obj_dir + "/athdl_sv",
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' '.join(param['atsim_run_flags']),
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' '.join(param['all_run_flags']),
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],
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*param,
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expect_filename=param['atsim_run_expect_filename'],
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)
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cmd = [
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"echo q | " + run_env + self.obj_dir + "/athdl_sv",
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' '.join(param['atsim_run_flags']), ' '.join(param['all_run_flags'])
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]
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('atsim_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/atsim_sim.log"),
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tee=param['tee'])
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elif param['ghdl']:
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self.run(
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logfile=self.obj_dir + "/ghdl_sim.log",
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fails=param['fails'],
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cmd=[
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run_env + self.obj_dir + "/simghdl",
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' '.join(param['ghdl_run_flags']),
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' '.join(param['all_run_flags']),
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],
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*param,
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expect_filename=param['ghdl_run_expect_filename'],
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)
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cmd = [
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run_env + self.obj_dir + "/simghdl", ' '.join(param['ghdl_run_flags']),
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' '.join(param['all_run_flags'])
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]
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('ghdl_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/ghdl_sim.log"),
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tee=param['tee'])
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elif param['iv']:
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cmd = [
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run_env + self.obj_dir + "/simiv",
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' '.join(param['iv_run_flags']),
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' '.join(param['all_run_flags']),
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run_env + self.obj_dir + "/simiv", ' '.join(param['iv_run_flags']),
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' '.join(param['all_run_flags'])
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]
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if param['use_libvpi']:
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# Don't enter command line on $stop, include vpi
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cmd += ["vvp -n -m " + self.obj_dir + "/libvpi.so"]
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self.run(
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logfile=self.obj_dir + "/iv_sim.log",
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fails=param['fails'],
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cmd=cmd,
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*param,
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expect_filename=param['iv_run_expect_filename'],
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)
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('iv_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/vlt_sim.log"),
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tee=param['tee'])
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elif param['ms']:
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pli_opt = ""
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if param['use_libvpi']:
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pli_opt = "-pli " + self.obj_dir + "/libvpi.so"
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self.run(
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logfile=self.obj_dir + "/ms_sim.log",
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fails=param['fails'],
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cmd=[
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"echo q | " + run_env + VtOs.getenv_def('VERILATOR_MODELSIM', "vsim"),
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' '.join(param['ms_run_flags']), ' '.join(param['all_run_flags']), pli_opt,
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(" top")
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],
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*param,
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expect_filename=param['ms_expect_filename'],
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)
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cmd = [
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"echo q | " + run_env + VtOs.getenv_def('VERILATOR_MODELSIM', "vsim"),
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' '.join(param['ms_run_flags']), ' '.join(param['all_run_flags']), pli_opt,
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(" top")
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]
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('ms_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/ms_sim.log"),
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tee=param['tee'])
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elif param['nc']:
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self.run(
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logfile=self.obj_dir + "/nc_sim.log",
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fails=param['fails'],
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cmd=[
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"echo q | " + run_env + VtOs.getenv_def('VERILATOR_NCVERILOG', "ncverilog"),
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' '.join(param['nc_run_flags']),
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' '.join(param['all_run_flags']),
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],
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*param,
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expect_filename=param['nc_run_expect_filename'],
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)
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cmd = [
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"echo q | " + run_env + VtOs.getenv_def('VERILATOR_NCVERILOG', "ncverilog"),
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' '.join(param['nc_run_flags']), ' '.join(param['all_run_flags'])
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]
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('nc_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/nc_sim.log"),
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tee=param['tee'])
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elif param['vcs']:
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# my $fh = IO::File->new(">simv.key") or die "%Error: $! simv.key,"
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# fh.print("quit\n"); fh.close()
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self.run(
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logfile=self.obj_dir + "/vcs_sim.log",
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cmd=[
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"echo q | " + run_env + "./simv",
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' '.join(param['vcs_run_flags']),
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' '.join(param['all_run_flags']),
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],
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*param,
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expect_filename=param['vcs_run_expect_filename'],
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)
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cmd = [
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"echo q | " + run_env + "./simv", ' '.join(param['vcs_run_flags']),
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' '.join(param['all_run_flags'])
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]
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('vcs_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/vcs_sim.log"),
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tee=param['tee'])
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elif param['xrun']:
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pli_opt = ""
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if param['use_libvpi']:
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pli_opt = "-loadvpi " + self.obj_dir + "/libvpi.so:vpi_compat_bootstrap"
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self.run(
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logfile=self.obj_dir + "/xrun_sim.log",
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fails=param['fails'],
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cmd=[
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"echo q | " + run_env + VtOs.getenv_def('VERILATOR_XRUN', "xrun"),
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' '.join(param['xrun_run_flags']),
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' '.join(param['xrun_flags2']),
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' '.join(param['all_run_flags']),
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pli_opt,
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param['top_filename'],
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],
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*param,
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expect_filename=param['xrun_run_expect_filename'],
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)
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cmd = [
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"echo q | " + run_env + VtOs.getenv_def('VERILATOR_XRUN', "xrun"),
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' '.join(param['xrun_run_flags']),
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' '.join(param['xrun_flags2']),
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' '.join(param['all_run_flags']),
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pli_opt,
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param['top_filename'],
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]
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('xrun_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/xrun_sim.log"),
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tee=param['tee'])
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elif param['xsim']:
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self.run(
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logfile=self.obj_dir + "/xsim_sim.log",
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fails=param['fails'],
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cmd=[
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run_env + VtOs.getenv_def('VERILATOR_XELAB', "xelab"),
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' '.join(param['xsim_run_flags']), ' '.join(param['xsim_run_flags2']),
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' '.join(param['all_run_flags']), (" " + self.name + ".top")
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],
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*param,
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expect_filename=param['xsim_expect_filename'],
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)
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cmd = [
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run_env + VtOs.getenv_def('VERILATOR_XELAB', "xelab"),
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' '.join(param['xsim_run_flags']), ' '.join(param['xsim_run_flags2']),
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' '.join(param['all_run_flags']), (" " + self.name + ".top")
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]
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self.run(cmd=cmd,
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check_finished=param['check_finished'],
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entering=param['entering'],
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expect_filename=param.get('xsim_run_expect_filename', None),
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fails=param['fails'],
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logfile=param.get('logfile', self.obj_dir + "/xsim_sim.log"),
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tee=param['tee'])
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elif param['vlt_all']:
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if not param['executable']:
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param['executable'] = self.obj_dir + "/" + param['vm_prefix']
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@ -1483,13 +1487,13 @@ class VlTest:
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debugger = VtOs.getenv_def('VERILATOR_GDB', "gdb") + " "
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elif Args.rrsim:
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debugger = "rr record "
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cmd = [
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(run_env + debugger + param['executable'] + (" -ex 'run " if Args.gdbsim else "")),
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*param['all_run_flags'],
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("'" if Args.gdbsim else ""),
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]
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self.run(
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cmd=[
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(run_env + debugger + param['executable'] +
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(" -ex 'run " if Args.gdbsim else "")),
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*param['all_run_flags'],
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("'" if Args.gdbsim else ""),
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],
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cmd=cmd,
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aslr_off=param['aslr_off'], # Disable address space layour randomization
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check_finished=param['check_finished'], # Check for All Finished
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entering=param['entering'], # Print entering directory information
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@ -2072,7 +2076,7 @@ class VlTest:
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def _make_top_v(self) -> None:
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self._read_inputs_v()
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with open(self.top_shell_filename(), 'w', encoding="utf8") as fh:
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with open(self.top_shell_filename, 'w', encoding="utf8") as fh:
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fh.write("module top;\n")
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for inp in sorted(self._inputs.keys()):
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fh.write(" reg " + inp + ";\n")
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@ -2107,7 +2111,7 @@ class VlTest:
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fh.write(" fastclk = 1;\n")
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if 'clk' in self._inputs:
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fh.write(" clk = 1;\n")
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fh.write(" while (" + time + " < " + self.sim_time + ") begin\n")
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fh.write(" while ($time < " + str(self.sim_time) + ") begin\n")
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for i in range(6):
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fh.write(" #1;\n")
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if 'fastclk' in self._inputs:
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