From cfb05cd70ac049e3b10f4da3cbad7f0e527c626e Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 11 Jun 2019 20:20:04 -0400 Subject: [PATCH] Whitespace cleanup. No functional change. --- src/verilog.l | 2 +- src/verilog.y | 60 +++++++++++++++++++++++++-------------------------- 2 files changed, 31 insertions(+), 31 deletions(-) diff --git a/src/verilog.l b/src/verilog.l index 99031c6c3..095f00ee8 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -52,7 +52,7 @@ extern void yyerrorf(const char* format, ...); if (!v3Global.opt.bboxSys()) yyerrorf(msg, yytext); \ return yaD_IGNORE; } -void V3ParseImp::ppline (const char* textp) { +void V3ParseImp::ppline(const char* textp) { // Handle `line directive int enterExit; fileline()->lineDirective(textp, enterExit/*ref*/); diff --git a/src/verilog.y b/src/verilog.y index c824c7841..c05d2a237 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -1630,7 +1630,7 @@ enumDecl: ; enum_base_typeE: // IEEE: enum_base_type - /* empty */ { $$ = new AstBasicDType(CRELINE(),AstBasicDTypeKwd::INT); } + /* empty */ { $$ = new AstBasicDType(CRELINE(), AstBasicDTypeKwd::INT); } // // Not in spec, but obviously "enum [1:0]" should work // // implicit_type expanded, without empty // // Note enum base types are always packed data types @@ -2223,7 +2223,7 @@ cellpinItList: // IEEE: list_of_port_connections cellparamItemE: // IEEE: named_parameter_assignment + empty // Note empty can match either () or (,); V3LinkCells cleans up () - /* empty: ',,' is legal */ { $$ = new AstPin(CRELINE(),PINNUMINC(),"",NULL); } + /* empty: ',,' is legal */ { $$ = new AstPin(CRELINE(), PINNUMINC(), "", NULL); } | yP_DOTSTAR { $$ = new AstPin($1,PINNUMINC(),".*",NULL); } | '.' idSVKwd { $$ = new AstPin($1,PINNUMINC(),*$2,new AstParseRef($1,AstParseRefExp::PX_TEXT,*$2,NULL,NULL)); $$->svImplicit(true);} | '.' idAny { $$ = new AstPin($1,PINNUMINC(),*$2,new AstParseRef($1,AstParseRefExp::PX_TEXT,*$2,NULL,NULL)); $$->svImplicit(true);} @@ -2244,7 +2244,7 @@ cellparamItemE: // IEEE: named_parameter_assignment + empty cellpinItemE: // IEEE: named_port_connection + empty // Note empty can match either () or (,); V3LinkCells cleans up () - /* empty: ',,' is legal */ { $$ = new AstPin(CRELINE(),PINNUMINC(),"",NULL); } + /* empty: ',,' is legal */ { $$ = new AstPin(CRELINE(), PINNUMINC(), "", NULL); } | yP_DOTSTAR { $$ = new AstPin($1,PINNUMINC(),".*",NULL); } | '.' idSVKwd { $$ = new AstPin($1,PINNUMINC(),*$2,new AstParseRef($1,AstParseRefExp::PX_TEXT,*$2,NULL,NULL)); $$->svImplicit(true);} | '.' idAny { $$ = new AstPin($1,PINNUMINC(),*$2,new AstParseRef($1,AstParseRefExp::PX_TEXT,*$2,NULL,NULL)); $$->svImplicit(true);} @@ -3009,23 +3009,23 @@ funcId: // IEEE: function_data_type_or_implicit + part of function_bod // // IEEE: function_data_type_or_implicit must be expanded here to prevent conflict // // function_data_type expanded here to prevent conflicts with implicit_type:empty vs data_type:ID /**/ tfIdScoped - { $$ = new AstFunc ($1,*$1,NULL, - new AstBasicDType($1, LOGIC_IMPLICIT)); + { $$ = new AstFunc($1,*$1,NULL, + new AstBasicDType($1, LOGIC_IMPLICIT)); SYMP->pushNewUnder($$, NULL); } | signingE rangeList tfIdScoped - { $$ = new AstFunc ($3,*$3,NULL, - GRAMMARP->addRange(new AstBasicDType($3, LOGIC_IMPLICIT, $1), $2,true)); + { $$ = new AstFunc($3,*$3,NULL, + GRAMMARP->addRange(new AstBasicDType($3, LOGIC_IMPLICIT, $1), $2,true)); SYMP->pushNewUnder($$, NULL); } | signing tfIdScoped - { $$ = new AstFunc ($2,*$2,NULL, - new AstBasicDType($2, LOGIC_IMPLICIT, $1)); + { $$ = new AstFunc($2,*$2,NULL, + new AstBasicDType($2, LOGIC_IMPLICIT, $1)); SYMP->pushNewUnder($$, NULL); } | data_type tfIdScoped - { $$ = new AstFunc ($2,*$2,NULL,$1); + { $$ = new AstFunc($2,*$2,NULL,$1); SYMP->pushNewUnder($$, NULL); } // // To verilator tasks are the same as void functions (we separately detect time passing) | yVOID tfIdScoped - { $$ = new AstTask ($2,*$2,NULL); + { $$ = new AstTask($2,*$2,NULL); SYMP->pushNewUnder($$, NULL); } ; @@ -3180,8 +3180,8 @@ expr: // IEEE: part of expression/constant_expression/primary | '~' ~r~expr %prec prNEGATION { $$ = new AstNot ($1,$2); } | '|' ~r~expr %prec prREDUCTION { $$ = new AstRedOr ($1,$2); } | '^' ~r~expr %prec prREDUCTION { $$ = new AstRedXor ($1,$2); } - | yP_NAND ~r~expr %prec prREDUCTION { $$ = new AstLogNot($1,new AstRedAnd($1,$2)); } - | yP_NOR ~r~expr %prec prREDUCTION { $$ = new AstLogNot($1,new AstRedOr ($1,$2)); } + | yP_NAND ~r~expr %prec prREDUCTION { $$ = new AstLogNot($1, new AstRedAnd($1, $2)); } + | yP_NOR ~r~expr %prec prREDUCTION { $$ = new AstLogNot($1, new AstRedOr($1, $2)); } | yP_XNOR ~r~expr %prec prREDUCTION { $$ = new AstRedXnor ($1,$2); } // // // IEEE: inc_or_dec_expression @@ -3444,8 +3444,8 @@ argsExprListE: // IEEE: part of list_of_arguments ; argsExprOneE: // IEEE: part of list_of_arguments - /*empty*/ { $$ = new AstArg(CRELINE(),"",NULL); } - | expr { $$ = new AstArg(CRELINE(),"",$1); } + /*empty*/ { $$ = new AstArg(CRELINE(), "", NULL); } + | expr { $$ = new AstArg(CRELINE(), "", $1); } ; argsDottedList: // IEEE: part of list_of_arguments @@ -3593,60 +3593,60 @@ gateRangeE: gateBuf: gateIdE gateRangeE '(' variable_lvalue ',' gatePinExpr ')' - { $$ = new AstAssignW ($3,$4,$6); DEL($2); } + { $$ = new AstAssignW($3,$4,$6); DEL($2); } ; gateBufif0: gateIdE gateRangeE '(' variable_lvalue ',' gatePinExpr ',' gatePinExpr ')' - { $$ = new AstAssignW ($3,$4,new AstBufIf1($3,new AstNot($3,$8),$6)); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstBufIf1($3,new AstNot($3,$8),$6)); DEL($2); } ; gateBufif1: gateIdE gateRangeE '(' variable_lvalue ',' gatePinExpr ',' gatePinExpr ')' - { $$ = new AstAssignW ($3,$4,new AstBufIf1($3,$8,$6)); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstBufIf1($3,$8,$6)); DEL($2); } ; gateNot: gateIdE gateRangeE '(' variable_lvalue ',' gatePinExpr ')' - { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstNot($5,$6)); DEL($2); } ; gateNotif0: gateIdE gateRangeE '(' variable_lvalue ',' gatePinExpr ',' gatePinExpr ')' - { $$ = new AstAssignW ($3,$4,new AstBufIf1($3,new AstNot($3,$8), new AstNot($3, $6))); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstBufIf1($3,new AstNot($3,$8), new AstNot($3, $6))); DEL($2); } ; gateNotif1: gateIdE gateRangeE '(' variable_lvalue ',' gatePinExpr ',' gatePinExpr ')' - { $$ = new AstAssignW ($3,$4,new AstBufIf1($3,$8, new AstNot($3,$6))); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstBufIf1($3,$8, new AstNot($3,$6))); DEL($2); } ; gateAnd: gateIdE gateRangeE '(' variable_lvalue ',' gateAndPinList ')' - { $$ = new AstAssignW ($3,$4,$6); DEL($2); } + { $$ = new AstAssignW($3,$4,$6); DEL($2); } ; gateNand: gateIdE gateRangeE '(' variable_lvalue ',' gateAndPinList ')' - { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstNot($5,$6)); DEL($2); } ; gateOr: gateIdE gateRangeE '(' variable_lvalue ',' gateOrPinList ')' - { $$ = new AstAssignW ($3,$4,$6); DEL($2); } + { $$ = new AstAssignW($3,$4,$6); DEL($2); } ; gateNor: gateIdE gateRangeE '(' variable_lvalue ',' gateOrPinList ')' - { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstNot($5,$6)); DEL($2); } ; gateXor: gateIdE gateRangeE '(' variable_lvalue ',' gateXorPinList ')' - { $$ = new AstAssignW ($3,$4,$6); DEL($2); } + { $$ = new AstAssignW($3,$4,$6); DEL($2); } ; gateXnor: gateIdE gateRangeE '(' variable_lvalue ',' gateXorPinList ')' - { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); DEL($2); } + { $$ = new AstAssignW($3,$4,new AstNot($5,$6)); DEL($2); } ; gatePullup: - gateIdE gateRangeE '(' variable_lvalue ')' { $$ = new AstPull ($3, $4, true); DEL($2); } + gateIdE gateRangeE '(' variable_lvalue ')' { $$ = new AstPull($3, $4, true); DEL($2); } ; gatePulldown: - gateIdE gateRangeE '(' variable_lvalue ')' { $$ = new AstPull ($3, $4, false); DEL($2); } + gateIdE gateRangeE '(' variable_lvalue ')' { $$ = new AstPull($3, $4, false); DEL($2); } ; gateUnsup: - gateIdE gateRangeE '(' gateUnsupPinList ')' { $$ = new AstImplicit ($3,$4); DEL($2); } + gateIdE gateRangeE '(' gateUnsupPinList ')' { $$ = new AstImplicit($3,$4); DEL($2); } ; gateIdE: