From c2cf2bc0ba862099e9e881ed12f446e058328ec8 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 26 Jan 2009 18:36:59 -0500
Subject: [PATCH] Commentary

---
 bin/verilator | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/bin/verilator b/bin/verilator
index faf9a0e39..5dc835e5a 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -1304,6 +1304,7 @@ this to the signal causing a false loop may clear up the problem.
 IE, with the following
 
     reg splitme /* verilator isolate_assignments*/;
+    // Note the placement of the semicolon above
     always @* begin
       if (....) begin
          splitme = ....;
@@ -2363,7 +2364,8 @@ strips array bound checks where it believes them to be unnecessary.)
 
 In the SYSTEMC example above, if you had in our.v:
 
-         input clk /*verilator public*/;
+    input clk /*verilator public*/;
+    // Note the placement of the semicolon above
 
 From the sc_main.cpp file, you'd then: