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Simplify code by removing callbacks
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18
test_regress/t/TestVpiHierarchyMain.cpp
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18
test_regress/t/TestVpiHierarchyMain.cpp
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@ -0,0 +1,18 @@
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#include "verilated.h"
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#include "vpi_user.h"
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#include VM_PREFIX_INCLUDE
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void iterate(vpiHandle root_handle);
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int main(int argc, char** argv) {
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const std::unique_ptr<VerilatedContext> contextp{new VerilatedContext};
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contextp->commandArgs(argc, argv);
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const std::unique_ptr<VM_PREFIX> top{new VM_PREFIX{contextp.get(), ""}};
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iterate(nullptr);
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return 0;
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}
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@ -14,49 +14,18 @@
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#include <string_view>
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#include "vpi_user.h"
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#include "TestVpi.h"
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void iterate(TestVpiHandle root_handle) {
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TestVpiHandle module_iter = vpi_iterate(vpiModule, root_handle);
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for (TestVpiHandle handle = vpi_scan(module_iter); handle != nullptr;
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void iterate(vpiHandle root_handle) {
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vpiHandle module_iter = vpi_iterate(vpiModule, root_handle);
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for (vpiHandle handle = vpi_scan(module_iter); handle != nullptr;
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handle = vpi_scan(module_iter)) {
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iterate(handle);
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}
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TestVpiHandle reg_iter = vpi_iterate(vpiReg, root_handle);
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for (TestVpiHandle handle = vpi_scan(reg_iter); handle != nullptr;
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vpiHandle reg_iter = vpi_iterate(vpiReg, root_handle);
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for (vpiHandle handle = vpi_scan(reg_iter); handle != nullptr;
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handle = vpi_scan(reg_iter)) {
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const std::string_view name = vpi_get_str(vpiFullName, handle);
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std::cout << name << std::endl;
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}
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}
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PLI_INT32 start_of_sim(t_cb_data* data) {
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iterate(nullptr);
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return 0;
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}
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//cver, xcelium entry
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void vpi_compat_bootstrap(void) {
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// We're able to call vpi_main() here on Verilator/Xcelium,
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// but Icarus complains (rightfully so)
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s_cb_data cb_data;
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s_vpi_time vpi_time;
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vpi_time.high = 0;
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vpi_time.low = 0;
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vpi_time.type = vpiSimTime;
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cb_data.reason = cbStartOfSimulation;
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cb_data.cb_rtn = &start_of_sim;
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cb_data.obj = NULL;
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cb_data.time = &vpi_time;
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cb_data.value = NULL;
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cb_data.index = 0;
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cb_data.user_data = NULL;
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TestVpiHandle callback_h = vpi_register_cb(&cb_data);
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}
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// Verilator (via t_vpi_main.cpp), and standard LRM entry
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void (*vlog_startup_routines[])() = {vpi_compat_bootstrap, 0};
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@ -1,3 +1 @@
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[0] Model running...
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t.sub.clk
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*-* All Finished *-*
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@ -16,7 +16,7 @@ test.compile(make_top_shell=False,
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make_pli=True,
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verilator_flags2=[
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"--exe --vpi", test.pli_filename,
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test.t_dir + "/TestVpiMain.cpp"
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test.t_dir + "/TestVpiHierarchyMain.cpp"
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],
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make_flags=['CPPFLAGS_ADD=-DVL_NO_LEGACY'])
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