Fix FST traces to include vector range (#3296) (#3297)

docs/CONTRIBUTORS

@@ -41,6 +41,7 @@ James Hanlon
 James Hutchinson
 James Pallister
 Jamey Hicks
+Jamie Iles
 Jan Van Winkel
 Jean Berniolles
 Jeremy Bennett

include/verilated_fst_c.cpp

@@ -158,7 +158,8 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, vluint32_t elem
 }
 
 void VerilatedFst::declare(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                           fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
+                           fstVarType vartype, bool array, int arraynum, bool bussed, int msb,
+                           int lsb) {
     const int bits = ((msb > lsb) ? (msb - lsb) : (lsb - msb)) + 1;
 
     VerilatedTrace<VerilatedFst>::declCode(code, bits, false);
@@ -205,6 +206,7 @@ void VerilatedFst::declare(vluint32_t code, const char* name, int dtypenum, fstV
     std::stringstream name_ss;
     name_ss << symbol_name;
     if (array) name_ss << "[" << arraynum << "]";
+    if (bussed) name_ss << " [" << msb << ":" << lsb << "]";
     std::string name_str = name_ss.str();
 
     if (dtypenum > 0) {
@@ -223,23 +225,23 @@ void VerilatedFst::declare(vluint32_t code, const char* name, int dtypenum, fstV
 
 void VerilatedFst::declBit(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                            fstVarType vartype, bool array, int arraynum) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, 0, 0);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 0, 0);
 }
 void VerilatedFst::declBus(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                            fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, msb, lsb);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declQuad(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                             fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, msb, lsb);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declArray(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                              fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, msb, lsb);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declDouble(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
                               fstVarType vartype, bool array, int arraynum) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, 63, 0);
+    declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 63, 0);
 }
 
 // Note: emit* are only ever called from one place (full* in

include/verilated_fst_c.h

@@ -54,7 +54,7 @@ private:
     // CONSTRUCTORS
     VL_UNCOPYABLE(VerilatedFst);
     void declare(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                 fstVarType vartype, bool array, int arraynum, int msb, int lsb);
+                 fstVarType vartype, bool array, int arraynum, bool bussed, int msb, int lsb);
 
 protected:
     //=========================================================================

test_regress/t/t_interface_ref_trace_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Thu Apr  1 14:51:24 2021
+	Tue Feb 22 23:55:19 2022
 
 $end
 $version
@@ -11,220 +11,212 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$scope interface intf_1 $end
+$var integer 32 " cyc [31:0] $end
+$scope module a $end
+$scope module ac1 $end
+$scope interface intf_for_check $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 # value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 $end
-$var logic 32 % val200 $end
+$var logic 32 $ val100 [31:0] $end
+$var logic 32 % val200 [31:0] $end
 $upscope $end
 $upscope $end
-$scope module s1 $end
+$upscope $end
+$scope module ac2 $end
+$scope interface intf_for_check $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 ' val100 [31:0] $end
+$var logic 32 ( val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope module ac3 $end
+$scope interface intf_for_check $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ) value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 * val100 [31:0] $end
+$var logic 32 + val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope module as3 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 # value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ) value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 $end
-$var logic 32 % val200 $end
+$var logic 32 * val100 [31:0] $end
+$var logic 32 + val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope interface intf_in_sub_all $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ) value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 * val100 [31:0] $end
+$var logic 32 + val200 [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_one $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 $ val100 [31:0] $end
+$var logic 32 % val200 [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_two $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 ' val100 [31:0] $end
+$var logic 32 ( val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope module abcdefghijklmnopqrstuvwxyz $end
+$scope module ac1 $end
+$scope interface intf_for_check $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 ' val100 [31:0] $end
+$var logic 32 ( val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope module ac2 $end
+$scope interface intf_for_check $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 $ val100 [31:0] $end
+$var logic 32 % val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope module ac3 $end
+$scope interface intf_for_check $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 , value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 - val100 [31:0] $end
+$var logic 32 . val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope module as3 $end
+$scope interface intf_for_struct $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 , value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 - val100 [31:0] $end
+$var logic 32 . val200 [31:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$scope interface intf_in_sub_all $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 , value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 - val100 [31:0] $end
+$var logic 32 . val200 [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_one $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 ' val100 [31:0] $end
+$var logic 32 ( val200 [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_two $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var logic 32 $ val100 [31:0] $end
+$var logic 32 % val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module c1 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 # value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 $end
-$var logic 32 % val200 $end
-$upscope $end
-$upscope $end
-$upscope $end
-$scope module a $end
-$scope interface intf_one $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 # value $end
-$scope struct the_struct $end
-$var logic 32 $ val100 $end
-$var logic 32 % val200 $end
-$upscope $end
-$upscope $end
-$scope module ac1 $end
-$scope interface intf_for_check $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 # value $end
-$scope struct the_struct $end
-$var logic 32 $ val100 $end
-$var logic 32 % val200 $end
-$upscope $end
-$upscope $end
-$upscope $end
-$upscope $end
-$scope module abcdefghijklmnopqrstuvwxyz $end
-$scope interface intf_two $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 # value $end
-$scope struct the_struct $end
-$var logic 32 $ val100 $end
-$var logic 32 % val200 $end
-$upscope $end
-$upscope $end
-$scope module ac2 $end
-$scope interface intf_for_check $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 # value $end
-$scope struct the_struct $end
-$var logic 32 $ val100 $end
-$var logic 32 % val200 $end
-$upscope $end
-$upscope $end
-$upscope $end
-$upscope $end
-$scope interface intf_2 $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 & value $end
-$scope struct the_struct $end
-$var logic 32 ' val100 $end
-$var logic 32 ( val200 $end
-$upscope $end
-$upscope $end
-$scope module s2 $end
-$scope interface intf_for_struct $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 & value $end
-$scope struct the_struct $end
-$var logic 32 ' val100 $end
-$var logic 32 ( val200 $end
+$var logic 32 $ val100 [31:0] $end
+$var logic 32 % val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module c2 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 & value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 $end
-$var logic 32 ( val200 $end
+$var logic 32 ' val100 [31:0] $end
+$var logic 32 ( val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module a $end
-$scope interface intf_two $end
+$scope interface intf_1 $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 & value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 $end
-$var logic 32 ( val200 $end
+$var logic 32 $ val100 [31:0] $end
+$var logic 32 % val200 [31:0] $end
 $upscope $end
 $upscope $end
-$scope module ac2 $end
-$scope interface intf_for_check $end
+$scope interface intf_2 $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 & value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 $end
-$var logic 32 ( val200 $end
+$var logic 32 ' val100 [31:0] $end
+$var logic 32 ( val200 [31:0] $end
 $upscope $end
 $upscope $end
-$upscope $end
-$upscope $end
-$scope module abcdefghijklmnopqrstuvwxyz $end
-$scope interface intf_one $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 & value $end
-$scope struct the_struct $end
-$var logic 32 ' val100 $end
-$var logic 32 ( val200 $end
-$upscope $end
-$upscope $end
-$scope module ac1 $end
-$scope interface intf_for_check $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 & value $end
-$scope struct the_struct $end
-$var logic 32 ' val100 $end
-$var logic 32 ( val200 $end
-$upscope $end
-$upscope $end
-$upscope $end
-$upscope $end
-$scope module a $end
-$scope interface intf_in_sub_all $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 ) value $end
-$scope struct the_struct $end
-$var logic 32 * val100 $end
-$var logic 32 + val200 $end
-$upscope $end
-$upscope $end
-$scope module as3 $end
+$scope module s1 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 ) value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 * val100 $end
-$var logic 32 + val200 $end
+$var logic 32 $ val100 [31:0] $end
+$var logic 32 % val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module ac3 $end
-$scope interface intf_for_check $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 ) value $end
-$scope struct the_struct $end
-$var logic 32 * val100 $end
-$var logic 32 + val200 $end
-$upscope $end
-$upscope $end
-$upscope $end
-$upscope $end
-$scope module abcdefghijklmnopqrstuvwxyz $end
-$scope interface intf_in_sub_all $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 , value $end
-$scope struct the_struct $end
-$var logic 32 - val100 $end
-$var logic 32 . val200 $end
-$upscope $end
-$upscope $end
-$scope module as3 $end
+$scope module s2 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 , value $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 - val100 $end
-$var logic 32 . val200 $end
-$upscope $end
-$upscope $end
-$upscope $end
-$scope module ac3 $end
-$scope interface intf_for_check $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc $end
-$var integer 32 , value $end
-$scope struct the_struct $end
-$var logic 32 - val100 $end
-$var logic 32 . val200 $end
-$upscope $end
+$var logic 32 ' val100 [31:0] $end
+$var logic 32 ( val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end

test_regress/t/t_trace_abort_fst.out

@@ -1,5 +1,5 @@
 $date
-	Wed Jun 10 20:47:01 2020
+	Wed Feb 23 00:00:18 2022
 
 $end
 $version
@@ -12,7 +12,7 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var logic 3 " cyc $end
+$var logic 3 " cyc [2:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_abort_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Thu Apr  1 14:55:09 2021
+	Wed Feb 23 00:00:24 2022
 
 $end
 $version
@@ -11,7 +11,7 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var logic 3 " cyc $end
+$var logic 3 " cyc [2:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_array_fst.out

@@ -1,5 +1,5 @@
 $date
-	Thu Jul  1 22:53:18 2021
+	Wed Feb 23 00:00:41 2022
 
 $end
 $version
@@ -12,9 +12,9 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
+$var integer 32 " cyc [31:0] $end
 $scope struct biggie $end
-$var logic 1048577 # d $end
+$var logic 1048577 # d [1048576:0] $end
 $upscope $end
 $upscope $end
 $upscope $end

test_regress/t/t_trace_array_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Thu Apr  1 15:02:16 2021
+	Wed Feb 23 00:00:45 2022
 
 $end
 $version
@@ -11,9 +11,9 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
+$var integer 32 " cyc [31:0] $end
 $scope struct biggie $end
-$var logic 1048577 # d $end
+$var logic 1048577 # d [1048576:0] $end
 $upscope $end
 $upscope $end
 $upscope $end

test_regress/t/t_trace_cat_fst_0000.out

@@ -1,5 +1,5 @@
 $date
-	Wed Apr 14 17:11:07 2021
+	Wed Feb 23 00:00:47 2022
 
 $end
 $version
@@ -12,8 +12,8 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var integer 32 # unchanged $end
+$var integer 32 " cyc [31:0] $end
+$var integer 32 # unchanged [31:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_cat_fst_0100.out

@@ -1,5 +1,5 @@
 $date
-	Wed Apr 14 17:04:26 2021
+	Wed Feb 23 00:26:16 2022
 
 $end
 $version
@@ -12,8 +12,8 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var integer 32 # unchanged $end
+$var integer 32 " cyc [31:0] $end
+$var integer 32 # unchanged [31:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_complex_fst.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:40:48 2021
+	Wed Feb 23 00:01:04 2022
 
 $end
 $version
@@ -12,54 +12,54 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var logic 2 # v_strp $end
-$var logic 4 $ v_strp_strp $end
-$var logic 2 % v_unip_strp $end
-$var logic 2 & v_arrp $end
-$var logic 4 ' v_arrp_arrp $end
-$var logic 4 ( v_arrp_strp $end
+$var integer 32 " cyc [31:0] $end
+$var logic 2 # v_strp [1:0] $end
+$var logic 4 $ v_strp_strp [3:0] $end
+$var logic 2 % v_unip_strp [1:0] $end
+$var logic 2 & v_arrp [2:1] $end
+$var logic 4 ' v_arrp_arrp [3:0] $end
+$var logic 4 ( v_arrp_strp [3:0] $end
 $var logic 1 ) v_arru[1] $end
 $var logic 1 * v_arru[2] $end
 $var logic 1 + v_arru_arru[3][1] $end
 $var logic 1 , v_arru_arru[3][2] $end
 $var logic 1 - v_arru_arru[4][1] $end
 $var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] $end
-$var logic 2 0 v_arru_arrp[4] $end
-$var logic 2 1 v_arru_strp[3] $end
-$var logic 2 2 v_arru_strp[4] $end
+$var logic 2 / v_arru_arrp[3] [2:1] $end
+$var logic 2 0 v_arru_arrp[4] [2:1] $end
+$var logic 2 1 v_arru_strp[3] [1:0] $end
+$var logic 2 2 v_arru_strp[4] [1:0] $end
 $var real 64 3 v_real $end
 $var real 64 4 v_arr_real[0] $end
 $var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 $end
+$var logic 64 6 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed $end
+$var logic 32 7 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 $end
+$var logic 32 8 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb $end
-$var logic 6 : v_enumb2_str $end
-$var logic 8 ; unpacked_array[-2] $end
-$var logic 8 < unpacked_array[-1] $end
-$var logic 8 = unpacked_array[0] $end
+$var logic 3 9 v_enumb [2:0] $end
+$var logic 6 : v_enumb2_str [5:0] $end
+$var logic 8 ; unpacked_array[-2] [7:0] $end
+$var logic 8 < unpacked_array[-1] [7:0] $end
+$var logic 8 = unpacked_array[0] [7:0] $end
 $var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
-$scope module unnamedblk1 $end
-$var integer 32 ? b $end
-$scope module unnamedblk2 $end
-$var integer 32 @ a $end
-$upscope $end
+$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
+$var parameter 32 ? PARAM [31:0] $end
 $upscope $end
 $scope module p2 $end
-$var parameter 32 A PARAM $end
+$var parameter 32 @ PARAM [31:0] $end
 $upscope $end
 $scope module p3 $end
-$var parameter 32 B PARAM $end
+$var parameter 32 A PARAM [31:0] $end
+$upscope $end
+$scope module unnamedblk1 $end
+$var integer 32 B b [31:0] $end
+$scope module unnamedblk2 $end
+$var integer 32 C a [31:0] $end
 $upscope $end
-$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 C PARAM $end
 $upscope $end
 $upscope $end
 $scope module $unit $end
@@ -70,11 +70,11 @@ $enddefinitions $end
 #0
 $dumpvars
 1D
-b00000000000000000000000000000100 C
-b00000000000000000000000000000011 B
-b00000000000000000000000000000010 A
-b00000000000000000000000000000000 @
-b00000000000000000000000000000000 ?
+b00000000000000000000000000000000 C
+b00000000000000000000000000000000 B
+b00000000000000000000000000000011 A
+b00000000000000000000000000000010 @
+b00000000000000000000000000000100 ?
 0>
 b00000000 =
 b00000000 <
@@ -126,8 +126,8 @@ b0000000000000000000000000000000100000000000000000000000011111110 6
 b00000000000000000000000000000001 7
 b00000000000000000000000000000010 8
 b111 9
-b00000000000000000000000000000101 ?
-b00000000000000000000000000000101 @
+b00000000000000000000000000000101 B
+b00000000000000000000000000000101 C
 #15
 0!
 #20

test_regress/t/t_trace_complex_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:40:52 2021
+	Wed Feb 23 00:01:09 2022
 
 $end
 $version
@@ -11,54 +11,54 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var logic 2 # v_strp $end
-$var logic 4 $ v_strp_strp $end
-$var logic 2 % v_unip_strp $end
-$var logic 2 & v_arrp $end
-$var logic 4 ' v_arrp_arrp $end
-$var logic 4 ( v_arrp_strp $end
+$var integer 32 " cyc [31:0] $end
+$var logic 2 # v_strp [1:0] $end
+$var logic 4 $ v_strp_strp [3:0] $end
+$var logic 2 % v_unip_strp [1:0] $end
+$var logic 2 & v_arrp [2:1] $end
+$var logic 4 ' v_arrp_arrp [3:0] $end
+$var logic 4 ( v_arrp_strp [3:0] $end
 $var logic 1 ) v_arru[1] $end
 $var logic 1 * v_arru[2] $end
 $var logic 1 + v_arru_arru[3][1] $end
 $var logic 1 , v_arru_arru[3][2] $end
 $var logic 1 - v_arru_arru[4][1] $end
 $var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] $end
-$var logic 2 0 v_arru_arrp[4] $end
-$var logic 2 1 v_arru_strp[3] $end
-$var logic 2 2 v_arru_strp[4] $end
+$var logic 2 / v_arru_arrp[3] [2:1] $end
+$var logic 2 0 v_arru_arrp[4] [2:1] $end
+$var logic 2 1 v_arru_strp[3] [1:0] $end
+$var logic 2 2 v_arru_strp[4] [1:0] $end
 $var real 64 3 v_real $end
 $var real 64 4 v_arr_real[0] $end
 $var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 $end
+$var logic 64 6 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed $end
+$var logic 32 7 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 $end
+$var logic 32 8 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb $end
-$var logic 6 : v_enumb2_str $end
-$var logic 8 ; unpacked_array[-2] $end
-$var logic 8 < unpacked_array[-1] $end
-$var logic 8 = unpacked_array[0] $end
+$var logic 3 9 v_enumb [2:0] $end
+$var logic 6 : v_enumb2_str [5:0] $end
+$var logic 8 ; unpacked_array[-2] [7:0] $end
+$var logic 8 < unpacked_array[-1] [7:0] $end
+$var logic 8 = unpacked_array[0] [7:0] $end
 $var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
-$scope module unnamedblk1 $end
-$var integer 32 ? b $end
-$scope module unnamedblk2 $end
-$var integer 32 @ a $end
-$upscope $end
+$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
+$var parameter 32 ? PARAM [31:0] $end
 $upscope $end
 $scope module p2 $end
-$var parameter 32 A PARAM $end
+$var parameter 32 @ PARAM [31:0] $end
 $upscope $end
 $scope module p3 $end
-$var parameter 32 B PARAM $end
+$var parameter 32 A PARAM [31:0] $end
+$upscope $end
+$scope module unnamedblk1 $end
+$var integer 32 B b [31:0] $end
+$scope module unnamedblk2 $end
+$var integer 32 C a [31:0] $end
 $upscope $end
-$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 C PARAM $end
 $upscope $end
 $upscope $end
 $scope module $unit $end
@@ -69,11 +69,11 @@ $enddefinitions $end
 #0
 $dumpvars
 1D
-b00000000000000000000000000000100 C
-b00000000000000000000000000000011 B
-b00000000000000000000000000000010 A
-b00000000000000000000000000000000 @
-b00000000000000000000000000000000 ?
+b00000000000000000000000000000000 C
+b00000000000000000000000000000000 B
+b00000000000000000000000000000011 A
+b00000000000000000000000000000010 @
+b00000000000000000000000000000100 ?
 0>
 b00000000 =
 b00000000 <
@@ -125,8 +125,8 @@ b0000000000000000000000000000000100000000000000000000000011111110 6
 b00000000000000000000000000000001 7
 b00000000000000000000000000000010 8
 b111 9
-b00000000000000000000000000000101 ?
-b00000000000000000000000000000101 @
+b00000000000000000000000000000101 B
+b00000000000000000000000000000101 C
 #11
 #12
 #13

test_regress/t/t_trace_complex_params_fst.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:41:14 2021
+	Wed Feb 23 00:01:11 2022
 
 $end
 $version
@@ -12,54 +12,54 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var logic 2 # v_strp $end
-$var logic 4 $ v_strp_strp $end
-$var logic 2 % v_unip_strp $end
-$var logic 2 & v_arrp $end
-$var logic 4 ' v_arrp_arrp $end
-$var logic 4 ( v_arrp_strp $end
+$var integer 32 " cyc [31:0] $end
+$var logic 2 # v_strp [1:0] $end
+$var logic 4 $ v_strp_strp [3:0] $end
+$var logic 2 % v_unip_strp [1:0] $end
+$var logic 2 & v_arrp [2:1] $end
+$var logic 4 ' v_arrp_arrp [3:0] $end
+$var logic 4 ( v_arrp_strp [3:0] $end
 $var logic 1 ) v_arru[1] $end
 $var logic 1 * v_arru[2] $end
 $var logic 1 + v_arru_arru[3][1] $end
 $var logic 1 , v_arru_arru[3][2] $end
 $var logic 1 - v_arru_arru[4][1] $end
 $var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] $end
-$var logic 2 0 v_arru_arrp[4] $end
-$var logic 2 1 v_arru_strp[3] $end
-$var logic 2 2 v_arru_strp[4] $end
+$var logic 2 / v_arru_arrp[3] [2:1] $end
+$var logic 2 0 v_arru_arrp[4] [2:1] $end
+$var logic 2 1 v_arru_strp[3] [1:0] $end
+$var logic 2 2 v_arru_strp[4] [1:0] $end
 $var real 64 3 v_real $end
 $var real 64 4 v_arr_real[0] $end
 $var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 $end
+$var logic 64 6 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed $end
+$var logic 32 7 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 $end
+$var logic 32 8 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb $end
-$var logic 6 : v_enumb2_str $end
-$var logic 8 ; unpacked_array[-2] $end
-$var logic 8 < unpacked_array[-1] $end
-$var logic 8 = unpacked_array[0] $end
+$var logic 3 9 v_enumb [2:0] $end
+$var logic 6 : v_enumb2_str [5:0] $end
+$var logic 8 ; unpacked_array[-2] [7:0] $end
+$var logic 8 < unpacked_array[-1] [7:0] $end
+$var logic 8 = unpacked_array[0] [7:0] $end
 $var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
-$scope module unnamedblk1 $end
-$var integer 32 ? b $end
-$scope module unnamedblk2 $end
-$var integer 32 @ a $end
-$upscope $end
+$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
+$var parameter 32 ? PARAM [31:0] $end
 $upscope $end
 $scope module p2 $end
-$var parameter 32 A PARAM $end
+$var parameter 32 @ PARAM [31:0] $end
 $upscope $end
 $scope module p3 $end
-$var parameter 32 B PARAM $end
+$var parameter 32 A PARAM [31:0] $end
+$upscope $end
+$scope module unnamedblk1 $end
+$var integer 32 B b [31:0] $end
+$scope module unnamedblk2 $end
+$var integer 32 C a [31:0] $end
 $upscope $end
-$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 C PARAM $end
 $upscope $end
 $upscope $end
 $scope module $unit $end
@@ -70,11 +70,11 @@ $enddefinitions $end
 #0
 $dumpvars
 1D
-b00000000000000000000000000000100 C
-b00000000000000000000000000000011 B
-b00000000000000000000000000000010 A
-b00000000000000000000000000000000 @
-b00000000000000000000000000000000 ?
+b00000000000000000000000000000000 C
+b00000000000000000000000000000000 B
+b00000000000000000000000000000011 A
+b00000000000000000000000000000010 @
+b00000000000000000000000000000100 ?
 0>
 b00000000 =
 b00000000 <
@@ -126,8 +126,8 @@ b0000000000000000000000000000000100000000000000000000000011111110 6
 b00000000000000000000000000000001 7
 b00000000000000000000000000000010 8
 b111 9
-b00000000000000000000000000000101 ?
-b00000000000000000000000000000101 @
+b00000000000000000000000000000101 B
+b00000000000000000000000000000101 C
 #15
 0!
 #20

test_regress/t/t_trace_complex_params_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:41:17 2021
+	Wed Feb 23 00:01:18 2022
 
 $end
 $version
@@ -11,54 +11,54 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var logic 2 # v_strp $end
-$var logic 4 $ v_strp_strp $end
-$var logic 2 % v_unip_strp $end
-$var logic 2 & v_arrp $end
-$var logic 4 ' v_arrp_arrp $end
-$var logic 4 ( v_arrp_strp $end
+$var integer 32 " cyc [31:0] $end
+$var logic 2 # v_strp [1:0] $end
+$var logic 4 $ v_strp_strp [3:0] $end
+$var logic 2 % v_unip_strp [1:0] $end
+$var logic 2 & v_arrp [2:1] $end
+$var logic 4 ' v_arrp_arrp [3:0] $end
+$var logic 4 ( v_arrp_strp [3:0] $end
 $var logic 1 ) v_arru[1] $end
 $var logic 1 * v_arru[2] $end
 $var logic 1 + v_arru_arru[3][1] $end
 $var logic 1 , v_arru_arru[3][2] $end
 $var logic 1 - v_arru_arru[4][1] $end
 $var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] $end
-$var logic 2 0 v_arru_arrp[4] $end
-$var logic 2 1 v_arru_strp[3] $end
-$var logic 2 2 v_arru_strp[4] $end
+$var logic 2 / v_arru_arrp[3] [2:1] $end
+$var logic 2 0 v_arru_arrp[4] [2:1] $end
+$var logic 2 1 v_arru_strp[3] [1:0] $end
+$var logic 2 2 v_arru_strp[4] [1:0] $end
 $var real 64 3 v_real $end
 $var real 64 4 v_arr_real[0] $end
 $var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 $end
+$var logic 64 6 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed $end
+$var logic 32 7 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 $end
+$var logic 32 8 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb $end
-$var logic 6 : v_enumb2_str $end
-$var logic 8 ; unpacked_array[-2] $end
-$var logic 8 < unpacked_array[-1] $end
-$var logic 8 = unpacked_array[0] $end
+$var logic 3 9 v_enumb [2:0] $end
+$var logic 6 : v_enumb2_str [5:0] $end
+$var logic 8 ; unpacked_array[-2] [7:0] $end
+$var logic 8 < unpacked_array[-1] [7:0] $end
+$var logic 8 = unpacked_array[0] [7:0] $end
 $var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
-$scope module unnamedblk1 $end
-$var integer 32 ? b $end
-$scope module unnamedblk2 $end
-$var integer 32 @ a $end
-$upscope $end
+$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
+$var parameter 32 ? PARAM [31:0] $end
 $upscope $end
 $scope module p2 $end
-$var parameter 32 A PARAM $end
+$var parameter 32 @ PARAM [31:0] $end
 $upscope $end
 $scope module p3 $end
-$var parameter 32 B PARAM $end
+$var parameter 32 A PARAM [31:0] $end
+$upscope $end
+$scope module unnamedblk1 $end
+$var integer 32 B b [31:0] $end
+$scope module unnamedblk2 $end
+$var integer 32 C a [31:0] $end
 $upscope $end
-$scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 C PARAM $end
 $upscope $end
 $upscope $end
 $scope module $unit $end
@@ -69,11 +69,11 @@ $enddefinitions $end
 #0
 $dumpvars
 1D
-b00000000000000000000000000000100 C
-b00000000000000000000000000000011 B
-b00000000000000000000000000000010 A
-b00000000000000000000000000000000 @
-b00000000000000000000000000000000 ?
+b00000000000000000000000000000000 C
+b00000000000000000000000000000000 B
+b00000000000000000000000000000011 A
+b00000000000000000000000000000010 @
+b00000000000000000000000000000100 ?
 0>
 b00000000 =
 b00000000 <
@@ -125,8 +125,8 @@ b0000000000000000000000000000000100000000000000000000000011111110 6
 b00000000000000000000000000000001 7
 b00000000000000000000000000000010 8
 b111 9
-b00000000000000000000000000000101 ?
-b00000000000000000000000000000101 @
+b00000000000000000000000000000101 B
+b00000000000000000000000000000101 C
 #11
 #12
 #13

test_regress/t/t_trace_complex_structs_fst.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:41:25 2021
+	Wed Feb 23 00:01:19 2022
 
 $end
 $version
@@ -12,7 +12,7 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
+$var integer 32 " cyc [31:0] $end
 $scope struct v_strp $end
 $var logic 1 # b1 $end
 $var logic 1 $ b0 $end
@@ -37,9 +37,9 @@ $var logic 1 ) b1 $end
 $var logic 1 * b0 $end
 $upscope $end
 $upscope $end
-$var logic 2 + v_arrp $end
-$var logic 2 , v_arrp_arrp[3] $end
-$var logic 2 - v_arrp_arrp[4] $end
+$var logic 2 + v_arrp [2:1] $end
+$var logic 2 , v_arrp_arrp[3] [2:1] $end
+$var logic 2 - v_arrp_arrp[4] [2:1] $end
 $scope struct v_arrp_strp[3] $end
 $var logic 1 . b1 $end
 $var logic 1 / b0 $end
@@ -54,8 +54,8 @@ $var logic 1 4 v_arru_arru[3][1] $end
 $var logic 1 5 v_arru_arru[3][2] $end
 $var logic 1 6 v_arru_arru[4][1] $end
 $var logic 1 7 v_arru_arru[4][2] $end
-$var logic 2 8 v_arru_arrp[3] $end
-$var logic 2 9 v_arru_arrp[4] $end
+$var logic 2 8 v_arru_arrp[3] [2:1] $end
+$var logic 2 9 v_arru_arrp[4] [2:1] $end
 $scope struct v_arru_strp[3] $end
 $var logic 1 : b1 $end
 $var logic 1 ; b0 $end
@@ -68,33 +68,33 @@ $var real 64 > v_real $end
 $var real 64 ? v_arr_real[0] $end
 $var real 64 @ v_arr_real[1] $end
 $scope struct v_str32x2[0] $end
-$var logic 32 A data $end
+$var logic 32 A data [31:0] $end
 $upscope $end
 $scope struct v_str32x2[1] $end
-$var logic 32 B data $end
+$var logic 32 B data [31:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $upscope $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 C v_enumed $end
+$var logic 32 C v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 D v_enumed2 $end
+$var logic 32 D v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 E v_enumb $end
+$var logic 3 E v_enumb [2:0] $end
 $scope struct v_enumb2_str $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 F a $end
+$var logic 3 F a [2:0] $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 G b $end
+$var logic 3 G b [2:0] $end
 $upscope $end
-$var logic 8 H unpacked_array[-2] $end
-$var logic 8 I unpacked_array[-1] $end
-$var logic 8 J unpacked_array[0] $end
+$var logic 8 H unpacked_array[-2] [7:0] $end
+$var logic 8 I unpacked_array[-1] [7:0] $end
+$var logic 8 J unpacked_array[0] [7:0] $end
 $var bit 1 K LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module unnamedblk1 $end
-$var integer 32 L b $end
+$var integer 32 L b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 M a $end
+$var integer 32 M a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end

test_regress/t/t_trace_complex_structs_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:41:29 2021
+	Wed Feb 23 00:01:26 2022
 
 $end
 $version
@@ -11,7 +11,7 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
+$var integer 32 " cyc [31:0] $end
 $scope struct v_strp $end
 $var logic 1 # b1 $end
 $var logic 1 $ b0 $end
@@ -36,9 +36,9 @@ $var logic 1 ) b1 $end
 $var logic 1 * b0 $end
 $upscope $end
 $upscope $end
-$var logic 2 + v_arrp $end
-$var logic 2 , v_arrp_arrp[3] $end
-$var logic 2 - v_arrp_arrp[4] $end
+$var logic 2 + v_arrp [2:1] $end
+$var logic 2 , v_arrp_arrp[3] [2:1] $end
+$var logic 2 - v_arrp_arrp[4] [2:1] $end
 $scope struct v_arrp_strp[3] $end
 $var logic 1 . b1 $end
 $var logic 1 / b0 $end
@@ -53,8 +53,8 @@ $var logic 1 4 v_arru_arru[3][1] $end
 $var logic 1 5 v_arru_arru[3][2] $end
 $var logic 1 6 v_arru_arru[4][1] $end
 $var logic 1 7 v_arru_arru[4][2] $end
-$var logic 2 8 v_arru_arrp[3] $end
-$var logic 2 9 v_arru_arrp[4] $end
+$var logic 2 8 v_arru_arrp[3] [2:1] $end
+$var logic 2 9 v_arru_arrp[4] [2:1] $end
 $scope struct v_arru_strp[3] $end
 $var logic 1 : b1 $end
 $var logic 1 ; b0 $end
@@ -67,33 +67,33 @@ $var real 64 > v_real $end
 $var real 64 ? v_arr_real[0] $end
 $var real 64 @ v_arr_real[1] $end
 $scope struct v_str32x2[0] $end
-$var logic 32 A data $end
+$var logic 32 A data [31:0] $end
 $upscope $end
 $scope struct v_str32x2[1] $end
-$var logic 32 B data $end
+$var logic 32 B data [31:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $upscope $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 C v_enumed $end
+$var logic 32 C v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 D v_enumed2 $end
+$var logic 32 D v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 E v_enumb $end
+$var logic 3 E v_enumb [2:0] $end
 $scope struct v_enumb2_str $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 F a $end
+$var logic 3 F a [2:0] $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 G b $end
+$var logic 3 G b [2:0] $end
 $upscope $end
-$var logic 8 H unpacked_array[-2] $end
-$var logic 8 I unpacked_array[-1] $end
-$var logic 8 J unpacked_array[0] $end
+$var logic 8 H unpacked_array[-2] [7:0] $end
+$var logic 8 I unpacked_array[-1] [7:0] $end
+$var logic 8 J unpacked_array[0] [7:0] $end
 $var bit 1 K LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module unnamedblk1 $end
-$var integer 32 L b $end
+$var integer 32 L b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 M a $end
+$var integer 32 M a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end

test_regress/t/t_trace_fst.out

@@ -1,5 +1,5 @@
 $date
-	Tue Aug 10 15:48:30 2021
+	Wed Feb 23 00:01:36 2022
 
 $end
 $version
@@ -10,24 +10,24 @@ $timescale
 $end
 $scope module top $end
 $var wire 1 ! clk $end
-$var wire 5 " state $end
+$var wire 5 " state [4:0] $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var int 32 # cyc $end
+$var int 32 # cyc [31:0] $end
 $var logic 1 $ rstn $end
-$var wire 5 " state $end
+$var wire 5 " state [4:0] $end
 $var real_parameter 64 % fst_gparam_real $end
 $var real_parameter 64 & fst_lparam_real $end
 $var real 64 % fst_real $end
-$var integer 32 ' fst_integer $end
+$var integer 32 ' fst_integer [31:0] $end
 $var bit 1 ( fst_bit $end
 $var logic 1 ) fst_logic $end
-$var int 32 * fst_int $end
-$var shortint 16 + fst_shortint $end
-$var longint 64 , fst_longint $end
-$var byte 8 - fst_byte $end
-$var parameter 32 . fst_parameter $end
-$var parameter 32 / fst_lparam $end
+$var int 32 * fst_int [31:0] $end
+$var shortint 16 + fst_shortint [15:0] $end
+$var longint 64 , fst_longint [63:0] $end
+$var byte 8 - fst_byte [7:0] $end
+$var parameter 32 . fst_parameter [31:0] $end
+$var parameter 32 / fst_lparam [31:0] $end
 $var supply0 1 0 fst_supply0 $end
 $var supply1 1 1 fst_supply1 $end
 $var tri0 1 2 fst_tri0 $end
@@ -37,16 +37,16 @@ $var wire 1 5 fst_wire $end
 $scope module test $end
 $var wire 1 ! clk $end
 $var wire 1 $ rstn $end
-$var wire 5 " state $end
-$var logic 5 6 state_w $end
-$var logic 5 7 state_array[0] $end
-$var logic 5 8 state_array[1] $end
-$var logic 5 9 state_array[2] $end
-$scope module unnamedblk2 $end
-$var int 32 : i $end
-$upscope $end
+$var wire 5 " state [4:0] $end
+$var logic 5 6 state_w [4:0] $end
+$var logic 5 7 state_array[0] [4:0] $end
+$var logic 5 8 state_array[1] [4:0] $end
+$var logic 5 9 state_array[2] [4:0] $end
 $scope module unnamedblk1 $end
-$var int 32 ; i $end
+$var int 32 : i [31:0] $end
+$upscope $end
+$scope module unnamedblk2 $end
+$var int 32 ; i [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -90,7 +90,7 @@ b10100 6
 b00001 7
 b00001 8
 b00001 9
-b00000000000000000000000000000011 ;
+b00000000000000000000000000000011 :
 #15
 0!
 #20
@@ -149,7 +149,7 @@ b00000000000000000000000000001011 #
 b00000000000000000000000000001100 #
 b10100 9
 b01010 6
-b00000000000000000000000000000010 :
+b00000000000000000000000000000010 ;
 #125
 0!
 #130

test_regress/t/t_trace_fst_cmake.out

@@ -1,5 +1,5 @@
 $date
-	Tue Aug 10 15:48:40 2021
+	Wed Feb 23 00:01:51 2022
 
 $end
 $version
@@ -10,24 +10,24 @@ $timescale
 $end
 $scope module top $end
 $var wire 1 ! clk $end
-$var wire 5 " state $end
+$var wire 5 " state [4:0] $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var int 32 # cyc $end
+$var int 32 # cyc [31:0] $end
 $var logic 1 $ rstn $end
-$var wire 5 " state $end
+$var wire 5 " state [4:0] $end
 $var real_parameter 64 % fst_gparam_real $end
 $var real_parameter 64 & fst_lparam_real $end
 $var real 64 % fst_real $end
-$var integer 32 ' fst_integer $end
+$var integer 32 ' fst_integer [31:0] $end
 $var bit 1 ( fst_bit $end
 $var logic 1 ) fst_logic $end
-$var int 32 * fst_int $end
-$var shortint 16 + fst_shortint $end
-$var longint 64 , fst_longint $end
-$var byte 8 - fst_byte $end
-$var parameter 32 . fst_parameter $end
-$var parameter 32 / fst_lparam $end
+$var int 32 * fst_int [31:0] $end
+$var shortint 16 + fst_shortint [15:0] $end
+$var longint 64 , fst_longint [63:0] $end
+$var byte 8 - fst_byte [7:0] $end
+$var parameter 32 . fst_parameter [31:0] $end
+$var parameter 32 / fst_lparam [31:0] $end
 $var supply0 1 0 fst_supply0 $end
 $var supply1 1 1 fst_supply1 $end
 $var tri0 1 2 fst_tri0 $end
@@ -37,16 +37,16 @@ $var wire 1 5 fst_wire $end
 $scope module test $end
 $var wire 1 ! clk $end
 $var wire 1 $ rstn $end
-$var wire 5 " state $end
-$var logic 5 6 state_w $end
-$var logic 5 7 state_array[0] $end
-$var logic 5 8 state_array[1] $end
-$var logic 5 9 state_array[2] $end
-$scope module unnamedblk2 $end
-$var int 32 : i $end
-$upscope $end
+$var wire 5 " state [4:0] $end
+$var logic 5 6 state_w [4:0] $end
+$var logic 5 7 state_array[0] [4:0] $end
+$var logic 5 8 state_array[1] [4:0] $end
+$var logic 5 9 state_array[2] [4:0] $end
 $scope module unnamedblk1 $end
-$var int 32 ; i $end
+$var int 32 : i [31:0] $end
+$upscope $end
+$scope module unnamedblk2 $end
+$var int 32 ; i [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -90,7 +90,7 @@ b10100 6
 b00001 7
 b00001 8
 b00001 9
-b00000000000000000000000000000011 ;
+b00000000000000000000000000000011 :
 #15
 0!
 #20
@@ -149,7 +149,7 @@ b00000000000000000000000000001011 #
 b00000000000000000000000000001100 #
 b10100 9
 b01010 6
-b00000000000000000000000000000010 :
+b00000000000000000000000000000010 ;
 #125
 0!
 #130

test_regress/t/t_trace_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 00:05:19 2021
+	Wed Feb 23 00:01:58 2022
 
 $end
 $version
@@ -11,40 +11,40 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var int 32 " cyc $end
+$var int 32 " cyc [31:0] $end
 $var logic 1 # rstn $end
 $var real_parameter 64 $ fst_gparam_real $end
 $var real_parameter 64 % fst_lparam_real $end
 $var real 64 $ fst_real $end
-$var integer 32 & fst_integer $end
+$var integer 32 & fst_integer [31:0] $end
 $var bit 1 ' fst_bit $end
 $var logic 1 ( fst_logic $end
-$var int 32 ) fst_int $end
-$var shortint 16 * fst_shortint $end
-$var longint 64 + fst_longint $end
-$var byte 8 , fst_byte $end
-$var parameter 32 - fst_parameter $end
-$var parameter 32 . fst_lparam $end
+$var int 32 ) fst_int [31:0] $end
+$var shortint 16 * fst_shortint [15:0] $end
+$var longint 64 + fst_longint [63:0] $end
+$var byte 8 , fst_byte [7:0] $end
+$var parameter 32 - fst_parameter [31:0] $end
+$var parameter 32 . fst_lparam [31:0] $end
 $var supply0 1 / fst_supply0 $end
 $var supply1 1 0 fst_supply1 $end
 $var tri0 1 1 fst_tri0 $end
 $var tri1 1 2 fst_tri1 $end
 $var tri 1 3 fst_tri $end
 $var wire 1 4 fst_wire $end
-$var logic 5 5 state $end
+$var logic 5 5 state [4:0] $end
 $scope module test $end
 $var wire 1 ! clk $end
 $var wire 1 # rstn $end
-$var wire 5 5 state $end
-$var logic 5 6 state_w $end
-$var logic 5 7 state_array[0] $end
-$var logic 5 8 state_array[1] $end
-$var logic 5 9 state_array[2] $end
-$scope module unnamedblk2 $end
-$var int 32 : i $end
-$upscope $end
+$var wire 5 5 state [4:0] $end
+$var logic 5 6 state_w [4:0] $end
+$var logic 5 7 state_array[0] [4:0] $end
+$var logic 5 8 state_array[1] [4:0] $end
+$var logic 5 9 state_array[2] [4:0] $end
 $scope module unnamedblk1 $end
-$var int 32 ; i $end
+$var int 32 : i [31:0] $end
+$upscope $end
+$scope module unnamedblk2 $end
+$var int 32 ; i [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -88,7 +88,7 @@ b10100 6
 b00001 7
 b00001 8
 b00001 9
-b00000000000000000000000000000011 ;
+b00000000000000000000000000000011 :
 #11
 #12
 #13
@@ -235,7 +235,7 @@ b00000000000000000000000000001011 "
 b00000000000000000000000000001100 "
 b10100 9
 b01010 6
-b00000000000000000000000000000010 :
+b00000000000000000000000000000010 ;
 #121
 #122
 #123

test_regress/t/t_trace_fst_sc_cmake.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 02:14:06 2021
+	Wed Feb 23 10:00:37 2022
 
 $end
 $version
@@ -11,40 +11,40 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var int 32 " cyc $end
+$var int 32 " cyc [31:0] $end
 $var logic 1 # rstn $end
 $var real_parameter 64 $ fst_gparam_real $end
 $var real_parameter 64 % fst_lparam_real $end
 $var real 64 $ fst_real $end
-$var integer 32 & fst_integer $end
+$var integer 32 & fst_integer [31:0] $end
 $var bit 1 ' fst_bit $end
 $var logic 1 ( fst_logic $end
-$var int 32 ) fst_int $end
-$var shortint 16 * fst_shortint $end
-$var longint 64 + fst_longint $end
-$var byte 8 , fst_byte $end
-$var parameter 32 - fst_parameter $end
-$var parameter 32 . fst_lparam $end
+$var int 32 ) fst_int [31:0] $end
+$var shortint 16 * fst_shortint [15:0] $end
+$var longint 64 + fst_longint [63:0] $end
+$var byte 8 , fst_byte [7:0] $end
+$var parameter 32 - fst_parameter [31:0] $end
+$var parameter 32 . fst_lparam [31:0] $end
 $var supply0 1 / fst_supply0 $end
 $var supply1 1 0 fst_supply1 $end
 $var tri0 1 1 fst_tri0 $end
 $var tri1 1 2 fst_tri1 $end
 $var tri 1 3 fst_tri $end
 $var wire 1 4 fst_wire $end
-$var logic 5 5 state $end
+$var logic 5 5 state [4:0] $end
 $scope module test $end
 $var wire 1 ! clk $end
 $var wire 1 # rstn $end
-$var wire 5 5 state $end
-$var logic 5 6 state_w $end
-$var logic 5 7 state_array[0] $end
-$var logic 5 8 state_array[1] $end
-$var logic 5 9 state_array[2] $end
-$scope module unnamedblk2 $end
-$var int 32 : i $end
-$upscope $end
+$var wire 5 5 state [4:0] $end
+$var logic 5 6 state_w [4:0] $end
+$var logic 5 7 state_array[0] [4:0] $end
+$var logic 5 8 state_array[1] [4:0] $end
+$var logic 5 9 state_array[2] [4:0] $end
 $scope module unnamedblk1 $end
-$var int 32 ; i $end
+$var int 32 : i [31:0] $end
+$upscope $end
+$scope module unnamedblk2 $end
+$var int 32 ; i [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -88,7 +88,7 @@ b10100 6
 b00001 7
 b00001 8
 b00001 9
-b00000000000000000000000000000011 ;
+b00000000000000000000000000000011 :
 #11
 #12
 #13
@@ -235,7 +235,7 @@ b00000000000000000000000000001011 "
 b00000000000000000000000000001100 "
 b10100 9
 b01010 6
-b00000000000000000000000000000010 :
+b00000000000000000000000000000010 ;
 #121
 #122
 #123

test_regress/t/t_trace_litendian_fst.out

@@ -1,5 +1,5 @@
 $date
-	Sun May  3 21:53:46 2020
+	Wed Feb 23 00:02:30 2022
 
 $end
 $version
@@ -11,32 +11,32 @@ $end
 $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
-$var parameter 8 " P $end
+$var parameter 8 " P [0:7] $end
 $var wire 1 ! clk $end
-$var int 32 # cyc $end
-$var parameter 8 $ Q $end
-$var logic 1 % v_a $end
-$var logic 2 & v_b $end
-$var logic 8 ' v_c $end
-$var logic 9 ( v_d $end
-$var logic 16 ) v_e $end
-$var logic 17 * v_f $end
-$var logic 32 + v_g $end
-$var logic 33 , v_h $end
-$var logic 64 - v_i $end
-$var logic 65 . v_j $end
-$var logic 128 / v_k $end
-$var logic 129 0 v_l $end
-$var logic 256 1 v_m $end
-$var logic 257 2 v_n $end
-$var logic 512 3 v_o $end
-$var logic 3 4 v_p $end
-$var logic 15 5 v_q $end
-$var logic 31 6 v_r $end
-$var logic 63 7 v_s $end
-$var logic 127 8 v_t $end
-$var logic 255 9 v_u $end
-$var logic 511 : v_v $end
+$var int 32 # cyc [31:0] $end
+$var parameter 8 $ Q [0:7] $end
+$var logic 1 % v_a [0:0] $end
+$var logic 2 & v_b [0:1] $end
+$var logic 8 ' v_c [0:7] $end
+$var logic 9 ( v_d [0:8] $end
+$var logic 16 ) v_e [0:15] $end
+$var logic 17 * v_f [0:16] $end
+$var logic 32 + v_g [0:31] $end
+$var logic 33 , v_h [0:32] $end
+$var logic 64 - v_i [0:63] $end
+$var logic 65 . v_j [0:64] $end
+$var logic 128 / v_k [0:127] $end
+$var logic 129 0 v_l [0:128] $end
+$var logic 256 1 v_m [0:255] $end
+$var logic 257 2 v_n [0:256] $end
+$var logic 512 3 v_o [0:511] $end
+$var logic 3 4 v_p [-1:1] $end
+$var logic 15 5 v_q [-7:7] $end
+$var logic 31 6 v_r [-15:15] $end
+$var logic 63 7 v_s [-31:31] $end
+$var logic 127 8 v_t [-63:63] $end
+$var logic 255 9 v_u [-127:127] $end
+$var logic 511 : v_v [-255:255] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_litendian_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Thu Apr  1 15:29:34 2021
+	Wed Feb 23 00:02:36 2022
 
 $end
 $version
@@ -10,32 +10,32 @@ $timescale
 $end
 $scope module top $end
 $scope module t $end
-$var parameter 8 ! P $end
+$var parameter 8 ! P [0:7] $end
 $var wire 1 " clk $end
-$var int 32 # cyc $end
-$var parameter 8 $ Q $end
-$var logic 1 % v_a $end
-$var logic 2 & v_b $end
-$var logic 8 ' v_c $end
-$var logic 9 ( v_d $end
-$var logic 16 ) v_e $end
-$var logic 17 * v_f $end
-$var logic 32 + v_g $end
-$var logic 33 , v_h $end
-$var logic 64 - v_i $end
-$var logic 65 . v_j $end
-$var logic 128 / v_k $end
-$var logic 129 0 v_l $end
-$var logic 256 1 v_m $end
-$var logic 257 2 v_n $end
-$var logic 512 3 v_o $end
-$var logic 3 4 v_p $end
-$var logic 15 5 v_q $end
-$var logic 31 6 v_r $end
-$var logic 63 7 v_s $end
-$var logic 127 8 v_t $end
-$var logic 255 9 v_u $end
-$var logic 511 : v_v $end
+$var int 32 # cyc [31:0] $end
+$var parameter 8 $ Q [0:7] $end
+$var logic 1 % v_a [0:0] $end
+$var logic 2 & v_b [0:1] $end
+$var logic 8 ' v_c [0:7] $end
+$var logic 9 ( v_d [0:8] $end
+$var logic 16 ) v_e [0:15] $end
+$var logic 17 * v_f [0:16] $end
+$var logic 32 + v_g [0:31] $end
+$var logic 33 , v_h [0:32] $end
+$var logic 64 - v_i [0:63] $end
+$var logic 65 . v_j [0:64] $end
+$var logic 128 / v_k [0:127] $end
+$var logic 129 0 v_l [0:128] $end
+$var logic 256 1 v_m [0:255] $end
+$var logic 257 2 v_n [0:256] $end
+$var logic 512 3 v_o [0:511] $end
+$var logic 3 4 v_p [-1:1] $end
+$var logic 15 5 v_q [-7:7] $end
+$var logic 31 6 v_r [-15:15] $end
+$var logic 63 7 v_s [-31:31] $end
+$var logic 127 8 v_t [-63:63] $end
+$var logic 255 9 v_u [-127:127] $end
+$var logic 511 : v_v [-255:255] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_packed_struct_fst.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:42:37 2021
+	Wed Feb 23 00:02:43 2022
 
 $end
 $version
@@ -12,10 +12,10 @@ $scope module top $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var int 32 " cnt $end
-$var parameter 96 # v[0] $end
-$var parameter 96 $ v[1] $end
-$var parameter 96 % v[2] $end
+$var int 32 " cnt [31:0] $end
+$var parameter 96 # v[0] [95:0] $end
+$var parameter 96 $ v[1] [95:0] $end
+$var parameter 96 % v[2] [95:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_packed_struct_fst_sc.out

@@ -1,5 +1,5 @@
 $date
-	Wed Aug 11 12:42:40 2021
+	Wed Feb 23 00:02:49 2022
 
 $end
 $version
@@ -11,10 +11,10 @@ $end
 $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var int 32 " cnt $end
-$var parameter 96 # v[0] $end
-$var parameter 96 $ v[1] $end
-$var parameter 96 % v[2] $end
+$var int 32 " cnt [31:0] $end
+$var parameter 96 # v[0] [95:0] $end
+$var parameter 96 $ v[1] [95:0] $end
+$var parameter 96 % v[2] [95:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end

test_regress/t/t_trace_two_dumpfst_cc.out

@@ -1,5 +1,5 @@
 $date
-	Sun Apr 19 04:15:48 2020
+	Wed Feb 23 00:03:30 2022
 
 $end
 $version
@@ -12,74 +12,75 @@ $scope module topa $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var integer 32 # c_trace_on $end
+$var integer 32 " cyc [31:0] $end
+$var integer 32 # c_trace_on [31:0] $end
 $scope module sub $end
-$var integer 32 $ inside_sub_a $end
+$var integer 32 $ inside_sub_a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $enddefinitions $end
-$dumpvars
 #10
+$dumpvars
 b00000000000000000000000000000001 $
 b00000000000000000000000000000000 #
 b00000000000000000000000000000001 "
 1!
+$end
 #15
 0!
 #20
 1!
-b00000000000000000000000000000011 #
 b00000000000000000000000000000010 "
+b00000000000000000000000000000011 #
 #25
 0!
 #30
 1!
-b00000000000000000000000000000011 "
 b00000000000000000000000000000100 #
+b00000000000000000000000000000011 "
 #35
 0!
 #40
 1!
-b00000000000000000000000000000101 #
 b00000000000000000000000000000100 "
+b00000000000000000000000000000101 #
 #45
 0!
 #50
 1!
-b00000000000000000000000000000101 "
 b00000000000000000000000000000110 #
+b00000000000000000000000000000101 "
 #55
 0!
 #60
 1!
-b00000000000000000000000000000111 #
 b00000000000000000000000000000110 "
+b00000000000000000000000000000111 #
 #65
 0!
 #70
 1!
-b00000000000000000000000000000111 "
 b00000000000000000000000000001000 #
+b00000000000000000000000000000111 "
 #75
 0!
 #80
 1!
-b00000000000000000000000000001001 #
 b00000000000000000000000000001000 "
+b00000000000000000000000000001001 #
 #85
 0!
 #90
 1!
-b00000000000000000000000000001001 "
 b00000000000000000000000000001010 #
+b00000000000000000000000000001001 "
 #95
 0!
 #100
 1!
-b00000000000000000000000000001011 #
 b00000000000000000000000000001010 "
+b00000000000000000000000000001011 #
 #105
 0!
 #110

test_regress/t/t_trace_two_hdrfst_cc.out

@@ -1,5 +1,5 @@
 $date
-	Sun Apr 19 04:15:51 2020
+	Wed Feb 23 00:03:39 2022
 
 $end
 $version
@@ -12,10 +12,10 @@ $scope module topa $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var integer 32 # c_trace_on $end
+$var integer 32 " cyc [31:0] $end
+$var integer 32 # c_trace_on [31:0] $end
 $scope module sub $end
-$var integer 32 $ inside_sub_a $end
+$var integer 32 $ inside_sub_a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -23,109 +23,111 @@ $scope module topb $end
 $var wire 1 % clk $end
 $scope module t $end
 $var wire 1 % clk $end
-$var integer 32 & cyc $end
-$var integer 32 ' c_trace_on $end
+$var integer 32 & cyc [31:0] $end
+$var integer 32 ' c_trace_on [31:0] $end
 $var real 64 ( r $end
 $scope module sub $end
-$var integer 32 ) inside_sub_a $end
+$var integer 32 ) inside_sub_a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $enddefinitions $end
+#0
 $dumpvars
-0!
-b00000000000000000000000000000001 "
-b00000000000000000000000000000000 #
-b00000000000000000000000000000001 $
-0%
-b00000000000000000000000000000001 &
-b00000000000000000000000000000000 '
-r0 (
 b00000000000000000000000000000010 )
+r0 (
+b00000000000000000000000000000000 '
+b00000000000000000000000000000001 &
+0%
+b00000000000000000000000000000001 $
+b00000000000000000000000000000000 #
+b00000000000000000000000000000001 "
+0!
+$end
 #10
-r0.1 (
-1%
-b00000000000000000000000000000011 #
+1!
 b00000000000000000000000000000010 "
-1!
+b00000000000000000000000000000011 #
+1%
+r0.1 (
 #15
-0!
 0%
+0!
 #20
-1%
 1!
-b00000000000000000000000000000011 "
-b00000000000000000000000000000100 #
+1%
 r0.2 (
+b00000000000000000000000000000100 #
+b00000000000000000000000000000011 "
 #25
-0!
 0%
+0!
 #30
-1%
 1!
-r0.3 (
-b00000000000000000000000000000101 #
+1%
 b00000000000000000000000000000100 "
+b00000000000000000000000000000101 #
+r0.3 (
 #35
-0!
 0%
+0!
 #40
-1%
 1!
-b00000000000000000000000000000101 "
-b00000000000000000000000000000110 #
+1%
 r0.4 (
+b00000000000000000000000000000110 #
+b00000000000000000000000000000101 "
 #45
-0!
 0%
+0!
 #50
-1%
 1!
-r0.5 (
-b00000000000000000000000000000111 #
+1%
 b00000000000000000000000000000110 "
+b00000000000000000000000000000111 #
+r0.5 (
 #55
-0!
 0%
+0!
 #60
-1%
 1!
-b00000000000000000000000000000111 "
-b00000000000000000000000000001000 #
+1%
 r0.6 (
+b00000000000000000000000000001000 #
+b00000000000000000000000000000111 "
 #65
-0!
 0%
+0!
 #70
-1%
 1!
-r0.7 (
-b00000000000000000000000000001001 #
+1%
 b00000000000000000000000000001000 "
+b00000000000000000000000000001001 #
+r0.7 (
 #75
-0!
 0%
+0!
 #80
-1%
 1!
-b00000000000000000000000000001001 "
-b00000000000000000000000000001010 #
+1%
 r0.7999999999999999 (
+b00000000000000000000000000001010 #
+b00000000000000000000000000001001 "
 #85
-0!
 0%
+0!
 #90
-1%
 1!
-r0.8999999999999999 (
-b00000000000000000000000000001011 #
+1%
 b00000000000000000000000000001010 "
+b00000000000000000000000000001011 #
+r0.8999999999999999 (
 #95
-0!
 0%
+0!
 #100
-1%
 1!
-b00000000000000000000000000001011 "
-b00000000000000000000000000001100 #
+1%
 r0.9999999999999999 (
+b00000000000000000000000000001100 #
+b00000000000000000000000000001011 "

test_regress/t/t_trace_two_portfst_cc.out

@@ -1,5 +1,5 @@
 $date
-	Sun Apr 19 04:13:00 2020
+	Wed Feb 23 00:03:49 2022
 
 $end
 $version
@@ -12,74 +12,75 @@ $scope module topa $end
 $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var integer 32 " cyc $end
-$var integer 32 # c_trace_on $end
+$var integer 32 " cyc [31:0] $end
+$var integer 32 # c_trace_on [31:0] $end
 $scope module sub $end
-$var integer 32 $ inside_sub_a $end
+$var integer 32 $ inside_sub_a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $enddefinitions $end
-$dumpvars
 #10
+$dumpvars
 b00000000000000000000000000000001 $
 b00000000000000000000000000000000 #
 b00000000000000000000000000000001 "
 1!
+$end
 #15
 0!
 #20
 1!
-b00000000000000000000000000000011 #
 b00000000000000000000000000000010 "
+b00000000000000000000000000000011 #
 #25
 0!
 #30
 1!
-b00000000000000000000000000000011 "
 b00000000000000000000000000000100 #
+b00000000000000000000000000000011 "
 #35
 0!
 #40
 1!
-b00000000000000000000000000000101 #
 b00000000000000000000000000000100 "
+b00000000000000000000000000000101 #
 #45
 0!
 #50
 1!
-b00000000000000000000000000000101 "
 b00000000000000000000000000000110 #
+b00000000000000000000000000000101 "
 #55
 0!
 #60
 1!
-b00000000000000000000000000000111 #
 b00000000000000000000000000000110 "
+b00000000000000000000000000000111 #
 #65
 0!
 #70
 1!
-b00000000000000000000000000000111 "
 b00000000000000000000000000001000 #
+b00000000000000000000000000000111 "
 #75
 0!
 #80
 1!
-b00000000000000000000000000001001 #
 b00000000000000000000000000001000 "
+b00000000000000000000000000001001 #
 #85
 0!
 #90
 1!
-b00000000000000000000000000001001 "
 b00000000000000000000000000001010 #
+b00000000000000000000000000001001 "
 #95
 0!
 #100
 1!
-b00000000000000000000000000001011 #
 b00000000000000000000000000001010 "
+b00000000000000000000000000001011 #
 #105
 0!
 #110