From ae27b8944eceeac9f695afcdd251ece73b0f34c9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 13 Nov 2009 19:15:48 -0500
Subject: [PATCH] Tests: Align verilator & other clocks to start at time 10

---
 test_regress/driver.pl          | 62 ++++++++++++++--------
 test_regress/t/t_var_escape.out | 93 +--------------------------------
 2 files changed, 42 insertions(+), 113 deletions(-)

diff --git a/test_regress/driver.pl b/test_regress/driver.pl
index 54a9c954b..1a027b6ca 100755
--- a/test_regress/driver.pl
+++ b/test_regress/driver.pl
@@ -238,7 +238,7 @@ sub new {
 	pl_filename => undef,	# Name of .pl file to get setup from
 	make_top_shell => 1,	# Make a default __top.v file
 	make_main => 1,		# Make __main.cpp
-	sim_time => 1000,
+	sim_time => 1100,
 	benchmark => $opt_benchmark,
 	# All compilers
 	v_flags => [split(/\s+/,(" -f input.vc "
@@ -748,7 +748,6 @@ sub _make_main {
 	$set = "topp->";
     }
 
-    my $ctraceit = ($self->{trace} && !$self->{sp});
     if ($self->{trace}) {
 	$fh->print("\n");
 	$fh->print("#if VM_TRACE\n");
@@ -763,34 +762,22 @@ sub _make_main {
 	$fh->print("#endif\n");
     }
 
-    print $fh "    ${set}fastclk = true;\n" if $self->{inputs}{fastclk};
-    print $fh "    ${set}clk = true;\n" if $self->{inputs}{clk};
+    print $fh "    ${set}fastclk = false;\n" if $self->{inputs}{fastclk};
+    print $fh "    ${set}clk = false;\n" if $self->{inputs}{clk};
+    _print_advance_time($self, $fh, 10);
+
     print $fh "    while (sc_time_stamp() < sim_time && !Verilated::gotFinish()) {\n";
     for (my $i=0; $i<5; $i++) {
-	my $action;
+	my $action = 0;
 	if ($self->{inputs}{fastclk}) {
 	    print $fh "	${set}fastclk=!${set}fastclk;\n";
 	    $action = 1;
 	}
-	if ($i==4 && $self->{inputs}{clk}) {
+	if ($i==0 && $self->{inputs}{clk}) {
 	    print $fh "	${set}clk=!${set}clk;\n";
 	    $action = 1;
 	}
-	if ($self->sc_or_sp) {
-	    print $fh "#if (SYSTEMC_VERSION>=20070314)\n";
-	    print $fh "	sc_start(1,SC_NS);\n";
-	    print $fh "#else\n";
-	    print $fh "	sc_start(1);\n";
-	    print $fh "#endif\n";
-	} else {
-	    print $fh "	main_time+=1;\n";
-	    print $fh "	${set}eval();\n" if $action;
-	    if ($ctraceit) {
-		$fh->print("#if VM_TRACE\n");
-		$fh->print("	tfp->dump (main_time);\n");
-		$fh->print("#endif //VM_TRACE\n");
-	    }
-	}
+	_print_advance_time($self, $fh, 1, $action);
     }
     print $fh "    }\n";
     print $fh "    if (!Verilated::gotFinish()) {\n";
@@ -812,6 +799,36 @@ sub _make_main {
     $fh->close();
 }
 
+sub _print_advance_time {
+    my $self = shift;
+    my $fh = shift;
+    my $time = shift;
+    my $action = shift;
+
+    my $set;
+    if ($self->sp) { $set = ""; }
+    elsif ($self->sc) { $set = ""; }
+    else { $set = "topp->"; }
+
+    if ($self->sc_or_sp) {
+	print $fh "#if (SYSTEMC_VERSION>=20070314)\n";
+	print $fh "	sc_start(${time},SC_NS);\n";
+	print $fh "#else\n";
+	print $fh "	sc_start(${time});\n";
+	print $fh "#endif\n";
+    } else {
+	if ($action) {
+	    print $fh "	${set}eval();\n";
+	    if ($self->{trace} && !$self->{sp}) {
+		$fh->print("#if VM_TRACE\n");
+		$fh->print("	tfp->dump (main_time);\n");
+		$fh->print("#endif //VM_TRACE\n");
+	    }
+	}
+	print $fh "	main_time += ${time};\n";
+    }
+}
+
 #######################################################################
 
 sub _make_top {
@@ -846,6 +863,9 @@ sub _make_top {
     # Test
     print $fh "\n";
     print $fh "    initial begin\n";
+    print $fh "        fastclk=0;\n" if $self->{inputs}{fastclk};
+    print $fh "        clk=0;\n" if $self->{inputs}{clk};
+    print $fh "        #10;\n";
     print $fh "        fastclk=1;\n" if $self->{inputs}{fastclk};
     print $fh "        clk=1;\n" if $self->{inputs}{clk};
     print $fh "        while (\$time < $self->{sim_time}) begin\n";
diff --git a/test_regress/t/t_var_escape.out b/test_regress/t/t_var_escape.out
index 413243f37..8248ee119 100644
--- a/test_regress/t/t_var_escape.out
+++ b/test_regress/t/t_var_escape.out
@@ -1,5 +1,5 @@
 $version Generated by SpTraceVcd $end
-$date Sat Sep 26 08:06:30 2009
+$date Fri Nov 13 19:14:12 2009
  $end
 $timescale 1ns $end
 
@@ -33,25 +33,6 @@ $timescale 1ns $end
 $enddefinitions $end
 
 
-#1
-1$
-0%
-b11111111111111111111111111111110 &
-b00000000000000000000000000000001 #
-1'
-1(
-1)
-1*
-1+
-#2
-#3
-#4
-#5
-0'
-#6
-#7
-#8
-#9
 #10
 0$
 1%
@@ -62,16 +43,8 @@ b00000000000000000000000000000010 #
 0)
 0*
 0+
-#11
-#12
-#13
-#14
 #15
 0'
-#16
-#17
-#18
-#19
 #20
 1$
 0%
@@ -82,16 +55,8 @@ b00000000000000000000000000000011 #
 1)
 1*
 1+
-#21
-#22
-#23
-#24
 #25
 0'
-#26
-#27
-#28
-#29
 #30
 0$
 1%
@@ -102,16 +67,8 @@ b00000000000000000000000000000100 #
 0)
 0*
 0+
-#31
-#32
-#33
-#34
 #35
 0'
-#36
-#37
-#38
-#39
 #40
 1$
 0%
@@ -122,16 +79,8 @@ b00000000000000000000000000000101 #
 1)
 1*
 1+
-#41
-#42
-#43
-#44
 #45
 0'
-#46
-#47
-#48
-#49
 #50
 0$
 1%
@@ -142,16 +91,8 @@ b00000000000000000000000000000110 #
 0)
 0*
 0+
-#51
-#52
-#53
-#54
 #55
 0'
-#56
-#57
-#58
-#59
 #60
 1$
 0%
@@ -162,16 +103,8 @@ b00000000000000000000000000000111 #
 1)
 1*
 1+
-#61
-#62
-#63
-#64
 #65
 0'
-#66
-#67
-#68
-#69
 #70
 0$
 1%
@@ -182,16 +115,8 @@ b00000000000000000000000000001000 #
 0)
 0*
 0+
-#71
-#72
-#73
-#74
 #75
 0'
-#76
-#77
-#78
-#79
 #80
 1$
 0%
@@ -202,16 +127,8 @@ b00000000000000000000000000001001 #
 1)
 1*
 1+
-#81
-#82
-#83
-#84
 #85
 0'
-#86
-#87
-#88
-#89
 #90
 0$
 1%
@@ -222,16 +139,8 @@ b00000000000000000000000000001010 #
 0)
 0*
 0+
-#91
-#92
-#93
-#94
 #95
 0'
-#96
-#97
-#98
-#99
 #100
 1$
 0%