diff --git a/Changes b/Changes index 8fc0b4852..48cabf6b9 100644 --- a/Changes +++ b/Changes @@ -19,6 +19,8 @@ indicates the contributor was also the author of the fix; Thanks! *** Add PINMISSING and PINNOCONNECT lint checks. +*** Add --converge-limit option. [Holger Waechtler] + *** Fix generate operators not short circuiting, bug413. [by Jeremy Bennett] *** Fix parameters not supported in constant functions, bug474. [Alex Solomatnikov] diff --git a/bin/verilator b/bin/verilator index a0e1e9ecd..7fa2cd6b4 100755 --- a/bin/verilator +++ b/bin/verilator @@ -250,6 +250,7 @@ descriptions in the next sections for more information. --cc Create C++ output --cdc Clock domain crossing analysis --compiler Tune for specified C++ compiler + --converge-limit Tune convergence settle time --coverage Enable all coverage --coverage-line Enable line coverage --coverage-toggle Enable toggle coverage @@ -427,6 +428,11 @@ functions to avoid error C1061. =back +=item --converge-limit + +Rarely needed. Specifies the maximum number of runtime iterations before +creating a model failed to converge error. Defaults to 100. + =item --coverage Enables all forms of coverage, alias for "--coverage-line --coverage-toggle diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index 735abd8c1..b5797e24b 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -1556,7 +1556,8 @@ void EmitCImp::emitWrapEval(AstNodeModule* modp) { puts( "_eval(vlSymsp);\n"); #ifndef NEW_ORDERING puts( "__Vchange = _change_request(vlSymsp);\n"); - puts( "if (++__VclockLoop > 100) vl_fatal(__FILE__,__LINE__,__FILE__,\"Verilated model didn't converge\");\n"); + puts( "if (++__VclockLoop > "+cvtToStr(v3Global.opt.convergeLimit()) + +") vl_fatal(__FILE__,__LINE__,__FILE__,\"Verilated model didn't converge\");\n"); puts("}\n"); #endif puts("}\n"); @@ -1575,7 +1576,8 @@ void EmitCImp::emitWrapEval(AstNodeModule* modp) { puts( "_eval(vlSymsp);\n"); #ifndef NEW_ORDERING puts( "__Vchange = _change_request(vlSymsp);\n"); - puts( "if (++__VclockLoop > 100) vl_fatal(__FILE__,__LINE__,__FILE__,\"Verilated model didn't DC converge\");\n"); + puts( "if (++__VclockLoop > "+cvtToStr(v3Global.opt.convergeLimit()) + +") vl_fatal(__FILE__,__LINE__,__FILE__,\"Verilated model didn't DC converge\");\n"); puts( "}\n"); #endif puts("}\n"); diff --git a/src/V3Options.cpp b/src/V3Options.cpp index 1a8e58138..073514618 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -782,6 +782,10 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char shift; addCFlags(argv[i]); } + else if ( !strcmp (sw, "-converge-limit") && (i+1)