diff --git a/bin/verilator b/bin/verilator index 7dfed68b9..ab3061e22 100755 --- a/bin/verilator +++ b/bin/verilator @@ -3150,7 +3150,7 @@ analysis.) For example: The clock_enable attribute will cause the clock gate to be ignored in the scheduling algorithm, sometimes required for correct clock behavior, and always improving performance. It's also a good idea to enable the -IMPERFECTSCH warning, to insure all clock enables are properly recognized. +IMPERFECTSCH warning, to ensure all clock enables are properly recognized. Same as C in configuration files, see L for more information. @@ -4914,7 +4914,7 @@ Most synthesis tools similarly define SYNTHESIS for you. =item Why do I get "unexpected `do'" or "unexpected `bit'" errors? Do, bit, ref, return, and other words are now SystemVerilog keywords. You -should change your code to not use them to insure it works with newer +should change your code to not use them to ensure it works with newer tools. Alternatively, surround them by the Verilog 2005/SystemVerilog begin_keywords pragma to indicate Verilog 2001 code. diff --git a/docs/internals.adoc b/docs/internals.adoc index d9c4b0893..a7e155200 100644 --- a/docs/internals.adoc +++ b/docs/internals.adoc @@ -397,7 +397,7 @@ e.g. threads. We will work with contributors to fix up indentation style issues, but it is appreciated if you could match our style: -* All files should contain the magic header to insure standard indentation: +* All files should contain the magic header to ensure standard indentation: + // -*- mode: C++; c-file-style: "cc-mode" -*- + diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp index 9957f10fc..b707a1b4c 100644 --- a/src/V3Assert.cpp +++ b/src/V3Assert.cpp @@ -115,9 +115,9 @@ private: if (failsp) failsp->unlinkFrBackWithNext(); if (nodep->immediate()) { - UASSERT_OBJ(!sentreep, nodep, "Immediate assertions don't have sensivity"); + UASSERT_OBJ(!sentreep, nodep, "Immediate assertions don't have sensitivity"); } else { - UASSERT_OBJ(sentreep, nodep, "Concurrent assertions must have sensivity"); + UASSERT_OBJ(sentreep, nodep, "Concurrent assertions must have sensitivity"); sentreep->unlinkFrBack(); } // diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp index 237a8e685..533faa24d 100644 --- a/src/V3Cast.cpp +++ b/src/V3Cast.cpp @@ -75,7 +75,7 @@ private: relinkHandle.relink(castp); //if (debug()>8) castp->dumpTree(cout, "-castins: "); // - insureLower32Cast(castp); + ensureLower32Cast(castp); nodep->user1(1); // Now must be of known size } int castSize(AstNode* nodep) { @@ -84,13 +84,13 @@ private: else if (nodep->width() <= 16) return 16; else return VL_IDATASIZE; } - void insureCast(AstNode* nodep) { + void ensureCast(AstNode* nodep) { if (castSize(nodep->backp()) != castSize(nodep) || !nodep->user1()) { insertCast(nodep, castSize(nodep->backp())); } } - void insureLower32Cast(AstCCast* nodep) { + void ensureLower32Cast(AstCCast* nodep) { // If we have uint64 = CAST(uint64(x)) then the upcasting // really needs to be CAST(uint64(CAST(uint32(x))). // Otherwise a (uint64)(a>b) would return wrong value, as @@ -105,27 +105,27 @@ private: virtual void visit(AstNodeUniop* nodep) VL_OVERRIDE { iterateChildren(nodep); nodep->user1(nodep->lhsp()->user1()); - if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp()); + if (nodep->sizeMattersLhs()) ensureCast(nodep->lhsp()); } virtual void visit(AstNodeBiop* nodep) VL_OVERRIDE { iterateChildren(nodep); nodep->user1(nodep->lhsp()->user1() | nodep->rhsp()->user1()); - if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp()); - if (nodep->sizeMattersRhs()) insureCast(nodep->rhsp()); + if (nodep->sizeMattersLhs()) ensureCast(nodep->lhsp()); + if (nodep->sizeMattersRhs()) ensureCast(nodep->rhsp()); } virtual void visit(AstNodeTriop* nodep) VL_OVERRIDE { iterateChildren(nodep); nodep->user1(nodep->lhsp()->user1() | nodep->rhsp()->user1() | nodep->thsp()->user1()); - if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp()); - if (nodep->sizeMattersRhs()) insureCast(nodep->rhsp()); - if (nodep->sizeMattersThs()) insureCast(nodep->thsp()); + if (nodep->sizeMattersLhs()) ensureCast(nodep->lhsp()); + if (nodep->sizeMattersRhs()) ensureCast(nodep->rhsp()); + if (nodep->sizeMattersThs()) ensureCast(nodep->thsp()); } virtual void visit(AstCCast* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureLower32Cast(nodep); + ensureLower32Cast(nodep); nodep->user1(1); } virtual void visit(AstNegate* nodep) VL_OVERRIDE { @@ -137,7 +137,7 @@ private: // out = {32{a out = - (alhsp(), castSize(nodep)); } else { - insureCast(nodep->lhsp()); + ensureCast(nodep->lhsp()); } } virtual void visit(AstVarRef* nodep) VL_OVERRIDE { diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp index 3fddb581a..6581ec37e 100644 --- a/src/V3Clean.cpp +++ b/src/V3Clean.cpp @@ -135,15 +135,15 @@ private: cleanp->dtypeFrom(nodep); // Otherwise the AND normally picks LHS relinkHandle.relink(cleanp); } - void insureClean(AstNode* nodep) { + void ensureClean(AstNode* nodep) { computeCppWidth(nodep); if (!isClean(nodep)) insertClean(nodep); } - void insureCleanAndNext(AstNode* nodep) { + void ensureCleanAndNext(AstNode* nodep) { // Editing list, careful looping! for (AstNode* exprp = nodep; exprp; ) { AstNode* nextp = exprp->nextp(); - insureClean(exprp); + ensureClean(exprp); exprp = nextp; } } @@ -153,10 +153,10 @@ private: iterateChildren(nodep); computeCppWidth(nodep); if (nodep->cleanLhs()) { - insureClean(nodep->lhsp()); + ensureClean(nodep->lhsp()); } if (nodep->cleanRhs()) { - insureClean(nodep->rhsp()); + ensureClean(nodep->rhsp()); } //no setClean.. must do it in each user routine. } @@ -164,13 +164,13 @@ private: iterateChildren(nodep); computeCppWidth(nodep); if (nodep->cleanLhs()) { - insureClean(nodep->lhsp()); + ensureClean(nodep->lhsp()); } if (nodep->cleanRhs()) { - insureClean(nodep->rhsp()); + ensureClean(nodep->rhsp()); } if (nodep->cleanThs()) { - insureClean(nodep->thsp()); + ensureClean(nodep->thsp()); } //no setClean.. must do it in each user routine. } @@ -188,7 +188,7 @@ private: iterateChildren(nodep); computeCppWidth(nodep); if (nodep->cleanLhs()) { - insureClean(nodep->lhsp()); + ensureClean(nodep->lhsp()); } setClean(nodep, nodep->cleanOut()); } @@ -217,7 +217,7 @@ private: iterateChildren(nodep); computeCppWidth(nodep); if (nodep->cleanRhs()) { - insureClean(nodep->rhsp()); + ensureClean(nodep->rhsp()); } } virtual void visit(AstText* nodep) VL_OVERRIDE { @@ -238,7 +238,7 @@ private: if (!VN_IS(nodep->backp(), And)) { insertClean(nodep); } - insureCleanAndNext(nodep->bodysp()); + ensureCleanAndNext(nodep->bodysp()); } virtual void visit(AstTraceDecl* nodep) VL_OVERRIDE { // No cleaning, or would loose pointer to enum @@ -246,7 +246,7 @@ private: } virtual void visit(AstTraceInc* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureCleanAndNext(nodep->valuep()); + ensureCleanAndNext(nodep->valuep()); } virtual void visit(AstTypedef* nodep) VL_OVERRIDE { // No cleaning, or would loose pointer to enum @@ -260,34 +260,34 @@ private: // Control flow operators virtual void visit(AstNodeCond* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureClean(nodep->condp()); + ensureClean(nodep->condp()); setClean(nodep, isClean(nodep->expr1p()) && isClean(nodep->expr2p())); } virtual void visit(AstWhile* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureClean(nodep->condp()); + ensureClean(nodep->condp()); } virtual void visit(AstNodeIf* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureClean(nodep->condp()); + ensureClean(nodep->condp()); } virtual void visit(AstSFormatF* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureCleanAndNext(nodep->exprsp()); + ensureCleanAndNext(nodep->exprsp()); setClean(nodep, true); // generates a string, so not relevant } virtual void visit(AstUCStmt* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureCleanAndNext(nodep->bodysp()); + ensureCleanAndNext(nodep->bodysp()); } virtual void visit(AstCCall* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureCleanAndNext(nodep->argsp()); + ensureCleanAndNext(nodep->argsp()); setClean(nodep, true); } virtual void visit(AstCMethodHard* nodep) VL_OVERRIDE { iterateChildren(nodep); - insureCleanAndNext(nodep->pinsp()); + ensureCleanAndNext(nodep->pinsp()); setClean(nodep, true); } virtual void visit(AstIntfRef* nodep) VL_OVERRIDE { diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp index e7dc970e5..73d92c786 100644 --- a/src/V3Combine.cpp +++ b/src/V3Combine.cpp @@ -66,7 +66,7 @@ protected: static bool emptyFunctionDeletion() { return true; } static bool duplicateFunctionCombine() { return true; } // Note this is disabled, it still needed work - // Also repair it for DPI functions; when make __common need to insure proper + // Also repair it for DPI functions; when make __common need to ensure proper // flags get inherited from the old to new AstCFunc, and that AstText doesn't // get split between functions causing the text to have a dangling reference. bool statementCombine() { return false; } // duplicateFunctionCombine(); diff --git a/src/V3Const.cpp b/src/V3Const.cpp index 3489b5091..2ae16580a 100644 --- a/src/V3Const.cpp +++ b/src/V3Const.cpp @@ -1791,7 +1791,7 @@ private: // SENTREE(... SENITEM(x), SENGATE(SENITEM(x),*) ...) => SENITEM(x) // Do we need the SENITEM's to be identical? No because we're - // ORing between them; we just need to insure that the result is at + // ORing between them; we just need to ensure that the result is at // least as frequently activating. So we simply // SENGATE(SENITEM(x)) -> SENITEM(x), then let it collapse with the // other SENITEM(x). diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index bf083b7ba..aef949fe5 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -2064,7 +2064,7 @@ void EmitCImp::emitSavableImp(AstNodeModule* modp) { string op = de ? ">>" : "<<"; // NOLINTNEXTLINE(performance-inefficient-string-concatenation) puts("void "+modClassName(modp)+"::"+protect(funcname)+"("+classname+"& os) {\n"); - // Place a computed checksum to insure proper structure save/restore formatting + // Place a computed checksum to ensure proper structure save/restore formatting // OK if this hash includes some things we won't dump, since // just looking for loading the wrong model VHashSha256 hash; diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp index d8b2b30af..23fcd1e06 100644 --- a/src/V3EmitCSyms.cpp +++ b/src/V3EmitCSyms.cpp @@ -778,7 +778,7 @@ void EmitCSyms::emitDpiHdr() { puts("// DESCR" "IPTION: Verilator output: Prototypes for DPI import and export functions.\n"); puts("//\n"); puts("// Verilator includes this file in all generated .cpp files that use DPI functions.\n"); - puts("// Manually include this file where DPI .c import functions are declared to insure\n"); + puts("// Manually include this file where DPI .c import functions are declared to ensure\n"); puts("// the C functions match the expectations of the DPI imports.\n"); puts("\n"); puts("#include \"svdpi.h\"\n"); diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp index fd0868f94..ad7d91386 100644 --- a/src/V3EmitMk.cpp +++ b/src/V3EmitMk.cpp @@ -55,7 +55,7 @@ public: of.puts("VM_THREADS = "); of.puts(cvtToStr(v3Global.opt.threads())); of.puts("\n"); of.puts("# Tracing output mode? 0/1 (from --trace)\n"); of.puts("VM_TRACE = "); of.puts(v3Global.opt.trace()?"1":"0"); of.puts("\n"); - of.puts("# Tracing threadeds output mode? 0/1 (from --trace-fst-thread)\n"); + of.puts("# Tracing threaded output mode? 0/1 (from --trace-fst-thread)\n"); of.puts("VM_TRACE_THREADED = "); of.puts(v3Global.opt.traceFormat().threaded() ?"1":"0"); of.puts("\n"); diff --git a/src/V3Error.h b/src/V3Error.h index c9527a430..6562ce0d4 100644 --- a/src/V3Error.h +++ b/src/V3Error.h @@ -291,8 +291,8 @@ inline void v3errorEndFatal(std::ostringstream& sstr) { // Theses allow errors using << operators: v3error("foo"<<"bar"); // Careful, you can't put () around msg, as you would in most macro definitions -// Note the commas are the comma operator, not separating arguments. These are needed to insure -// evaluation order as otherwise we couldn't insure v3errorPrep is called first. +// Note the commas are the comma operator, not separating arguments. These are needed to ensure +// evaluation order as otherwise we couldn't ensure v3errorPrep is called first. #define v3warnCode(code,msg) \ v3errorEnd((V3Error::v3errorPrep(code), (V3Error::v3errorStr()<outBeginp(); edgep; edgep=edgep->outNextp()) { if (edgep->weight()==0) { // was cut OrderEdge* oedgep = dynamic_cast(edgep); - UASSERT_OBJ(oedgep, vvertexp->varScp(), "Cuttable edge not of proper type"); + UASSERT_OBJ(oedgep, vvertexp->varScp(), "Cutable edge not of proper type"); UINFO(6," CutCircularO: "<name()<inBeginp(); edgep; edgep = edgep->inNextp()) { if (edgep->weight()==0) { // was cut OrderEdge* oedgep = dynamic_cast(edgep); - UASSERT_OBJ(oedgep, vvertexp->varScp(), "Cuttable edge not of proper type"); + UASSERT_OBJ(oedgep, vvertexp->varScp(), "Cutable edge not of proper type"); UINFO(6," CutCircularI: "<name()<lhsp()->dtypep()->skipRefp(), NodeArrayDType)) { - nodep->lhsp()->v3error("Slice operatator "<lhsp()->prettyTypeName() + nodep->lhsp()->v3error("Slice operator "<lhsp()->prettyTypeName() <<" on non-slicable (e.g. non-vector) left-hand-side operand"); } else if (!VN_IS(nodep->rhsp()->dtypep()->skipRefp(), NodeArrayDType)) { - nodep->rhsp()->v3error("Slice operatator "<rhsp()->prettyTypeName() + nodep->rhsp()->v3error("Slice operator "<rhsp()->prettyTypeName() <<" on non-slicable (e.g. non-vector) right-hand-side operand"); } else { diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp index 06f3eee8a..740f8b12d 100644 --- a/src/V3WidthSel.cpp +++ b/src/V3WidthSel.cpp @@ -194,7 +194,7 @@ private: } // VISITORS - // If adding new visitors, insure V3Width's visit(TYPE) calls into here + // If adding new visitors, ensure V3Width's visit(TYPE) calls into here virtual void visit(AstSelBit* nodep) VL_OVERRIDE { // Select of a non-width specified part of an array, i.e. "array[2]" @@ -498,7 +498,7 @@ private: virtual void visit(AstSelMinus* nodep) VL_OVERRIDE { replaceSelPlusMinus(nodep); } - // If adding new visitors, insure V3Width's visit(TYPE) calls into here + // If adding new visitors, ensure V3Width's visit(TYPE) calls into here //-------------------- // Default diff --git a/src/bisonpre b/src/bisonpre index b6c1f9322..4db7d0bf6 100755 --- a/src/bisonpre +++ b/src/bisonpre @@ -392,7 +392,8 @@ sub clean_input { } elsif ($needmore) { # Bison doesn't have a #line directive, so we need somewhere to insert into $line =~ s!^\s*//.*$!!; - ($line =~ m/^\s*$/) or die "%Error: $filename:$l: Need $needmore more blank lines to insure line numbers are constant\n"; + ($line =~ m/^\s*$/) + or die "%Error: $filename:$l: Need $needmore more blank lines to keep line numbers are constant\n"; $needmore--; } else { push @lines, $line; diff --git a/test_regress/Makefile b/test_regress/Makefile index 46c13973f..82fff4a4d 100644 --- a/test_regress/Makefile +++ b/test_regress/Makefile @@ -24,12 +24,12 @@ include $(VERILATOR_ROOT)/include/verilated.mk ###################################################################### ifneq ($(VCS_HOME),) -#Default to off, even with vcs; not all tests are insured to be working +#Default to off, even with vcs; not all tests are ensured to be working #PRODUCTS += --vcs endif ifneq ($(NC_ROOT),) -#Default to off, even with vcs; not all tests are insured to be working +#Default to off, even with vcs; not all tests are ensured to be working #PRODUCTS += --nc endif diff --git a/test_regress/t/t_assert_synth.v b/test_regress/t/t_assert_synth.v index d48d5ccb0..4e090850b 100644 --- a/test_regress/t/t_assert_synth.v +++ b/test_regress/t/t_assert_synth.v @@ -18,7 +18,7 @@ module t (/*AUTOARG*/ wire a_l = ~a; wire b_oc_l = ~b_oc; - // Note we must insure that full, parallel, etc, only fire during + // Note we must ensure that full, parallel, etc, only fire during // edges (not mid-cycle), and must provide a way to turn them off. // SystemVerilog provides: $asserton and $assertoff. diff --git a/test_regress/t/t_fuzz_eqne_bad.out b/test_regress/t/t_fuzz_eqne_bad.out index 599558e7f..528089125 100644 --- a/test_regress/t/t_fuzz_eqne_bad.out +++ b/test_regress/t/t_fuzz_eqne_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_fuzz_eqne_bad.v:11: Slice operatator VARREF 't.b' on non-slicable (e.g. non-vector) right-hand-side operand +%Error: t/t_fuzz_eqne_bad.v:11: Slice operator VARREF 't.b' on non-slicable (e.g. non-vector) right-hand-side operand : ... In instance t.b initial c = (a != &b); ^ diff --git a/test_regress/t/t_preproc.v b/test_regress/t/t_preproc.v index 035188082..c1c645c31 100644 --- a/test_regress/t/t_preproc.v +++ b/test_regress/t/t_preproc.v @@ -400,7 +400,7 @@ EXP: This is fooed_2 `ifdef TEMP `error "bad0" `endif Line_Preproc_Check `__LINE__ //====================================================================== -// Quoted multiline - track line numbers, and insure \\n gets propagated +// Quoted multiline - track line numbers, and ensure \\n gets propagated `define MULQUOTE "FOO \ BAR " `define MULQUOTE2(mq) `MULQUOTE mq `MULQUOTE diff --git a/test_regress/t/t_preproc_comments.out b/test_regress/t/t_preproc_comments.out index 1618f90ff..37d76bdcc 100644 --- a/test_regress/t/t_preproc_comments.out +++ b/test_regress/t/t_preproc_comments.out @@ -652,7 +652,7 @@ hello4hello4hello4hello4 Line_Preproc_Check 401 //====================================================================== -// Quoted multiline - track line numbers, and insure \\n gets propagated +// Quoted multiline - track line numbers, and ensure \\n gets propagated diff --git a/test_regress/t/t_unroll_signed.v b/test_regress/t/t_unroll_signed.v index 45f99561c..38f287b80 100644 --- a/test_regress/t/t_unroll_signed.v +++ b/test_regress/t/t_unroll_signed.v @@ -27,7 +27,7 @@ module t (/*AUTOARG*/ integer i; reg [31:0] iu; - reg [31:0] dly_to_insure_was_unrolled [1:0]; + reg [31:0] dly_to_ensure_was_unrolled [1:0]; reg [2:0] i3; integer cyc; initial cyc=0; @@ -39,7 +39,7 @@ module t (/*AUTOARG*/ total = 0; for (i=5; i>=0; i=i-1) begin total = total - i -1; - dly_to_insure_was_unrolled[i] <= i; + dly_to_ensure_was_unrolled[i] <= i; end if (total != -21) $stop; end @@ -48,7 +48,7 @@ module t (/*AUTOARG*/ total = 0; for (i=5; i>0; i=i-1) begin total = total - i -1; - dly_to_insure_was_unrolled[i] <= i; + dly_to_ensure_was_unrolled[i] <= i; end if (total != -20) $stop; end @@ -57,7 +57,7 @@ module t (/*AUTOARG*/ total = 0; for (i=1; i<5; i=i+1) begin total = total - i -1; - dly_to_insure_was_unrolled[i] <= i; + dly_to_ensure_was_unrolled[i] <= i; end if (total != -14) $stop; end @@ -66,7 +66,7 @@ module t (/*AUTOARG*/ total = 0; for (i=1; i<=5; i=i+1) begin total = total - i -1; - dly_to_insure_was_unrolled[i] <= i; + dly_to_ensure_was_unrolled[i] <= i; end if (total != -20) $stop; end @@ -76,7 +76,7 @@ module t (/*AUTOARG*/ total = 0; for (iu=5; iu>=1; iu=iu-1) begin total = total - iu -1; - dly_to_insure_was_unrolled[iu] <= iu; + dly_to_ensure_was_unrolled[iu] <= iu; end if (total != -20) $stop; end @@ -85,7 +85,7 @@ module t (/*AUTOARG*/ total = 0; for (iu=5; iu>1; iu=iu-1) begin total = total - iu -1; - dly_to_insure_was_unrolled[iu] <= iu; + dly_to_ensure_was_unrolled[iu] <= iu; end if (total != -18) $stop; end @@ -94,7 +94,7 @@ module t (/*AUTOARG*/ total = 0; for (iu=1; iu<5; iu=iu+1) begin total = total - iu -1; - dly_to_insure_was_unrolled[iu] <= iu; + dly_to_ensure_was_unrolled[iu] <= iu; end if (total != -14) $stop; end @@ -103,7 +103,7 @@ module t (/*AUTOARG*/ total = 0; for (iu=1; iu<=5; iu=iu+1) begin total = total - iu -1; - dly_to_insure_was_unrolled[iu] <= iu; + dly_to_ensure_was_unrolled[iu] <= iu; end if (total != -20) $stop; end @@ -113,7 +113,7 @@ module t (/*AUTOARG*/ total = 0; for (i3=3'd0; i3<3'd7; i3=i3+3'd1) begin total = total - {29'd0,i3} -1; - dly_to_insure_was_unrolled[i3[0]] <= 0; + dly_to_ensure_was_unrolled[i3[0]] <= 0; end if (total != -28) $stop; end @@ -123,7 +123,7 @@ module t (/*AUTOARG*/ total = 0; for (i3=0; i3<3'd7; i3=i3+3'd1) begin total = total - {29'd0,i3} -1; - dly_to_insure_was_unrolled[i3[0]] <= 0; + dly_to_ensure_was_unrolled[i3[0]] <= 0; end if (total != -28) $stop; end @@ -133,7 +133,7 @@ module t (/*AUTOARG*/ total = 0; for (i3=3'd0; i3<7; i3=i3+1) begin total = total - {29'd0,i3} -1; - dly_to_insure_was_unrolled[i3[0]] <= 0; + dly_to_ensure_was_unrolled[i3[0]] <= 0; end if (total != -28) $stop; end diff --git a/test_regress/t/t_var_local.v b/test_regress/t/t_var_local.v index 543bf1a8d..4128e7912 100644 --- a/test_regress/t/t_var_local.v +++ b/test_regress/t/t_var_local.v @@ -43,7 +43,7 @@ module t; end end tsk; - tsk; // Second time to insure we reinit the initial value + tsk; // Second time to ensure we reinit the initial value $write("*-* All Finished *-*\n"); $finish; end