From 9dade8fbd9d7b9b610c510cdf1d41126ca26dc28 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 6 May 2008 01:11:21 +0000
Subject: [PATCH] Fix parametrized defines calling define with comma.  [Joshua
 Wise]

git-svn-id: file://localhost/svn/verilator/trunk/verilator@1048 77ca24e4-aefa-0310-84f0-b9a241c72d87
---
 Changes                      |  2 ++
 src/V3PreProc.cpp            | 11 ++++++++++-
 test_regress/t/t_preproc.out | 19 ++++++++++++++++---
 test_regress/t/t_preproc.v   | 13 +++++++++++++
 4 files changed, 41 insertions(+), 4 deletions(-)

diff --git a/Changes b/Changes
index ec2c747e6..c5d69ff8d 100644
--- a/Changes
+++ b/Changes
@@ -9,6 +9,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 **** Fix preprocessor `else after series of `elsif.  [Mark Nodine]
 
+**** Fix parametrized defines calling define with comma.  [Joshua Wise]
+
 * Verilator 3.662 2008/04/25
 
 ***  Add Verilog 2005 $clog2() function.
diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp
index 810e27d59..a9dd65648 100644
--- a/src/V3PreProc.cpp
+++ b/src/V3PreProc.cpp
@@ -911,7 +911,16 @@ int V3PreProcImp::getToken() {
 			string out = defValue(name);
 			UINFO(4,"Defref `"<<name<<" => '"<<out<<"'"<<endl);
 			// Similar code in parenthesized define (Search for END_OF_DEFARG)
-			m_lexp->unputString(out.c_str());
+			if (m_defRefs.empty()) {
+			    // Just output the substitution
+			    m_lexp->unputString(out.c_str());
+			} else {
+			    // Inside another define.  Can't subst now, or
+			    // `define a x,y
+			    // foo(`a,`b)  would break because a contains comma
+			    V3DefineRef* refp = &(m_defRefs.top());
+			    refp->nextarg(refp->nextarg()+m_lexp->m_defValue+out); m_lexp->m_defValue="";
+			}
 			goto next_tok;
 		    }
 		    else {  // Found, with parameters
diff --git a/test_regress/t/t_preproc.out b/test_regress/t/t_preproc.out
index 999585814..383982996 100644
--- a/test_regress/t/t_preproc.out
+++ b/test_regress/t/t_preproc.out
@@ -155,13 +155,26 @@ wire  tmp_d2  = d2 ;  wire  tmp_o2  = tmp_d2  + 1;  assign o2  = tmp_o2  ;
    generate for (i=0; i<(3); i=i+1) begin        psl cover {  m5k.f .ctl._ctl_mvldx_m1.d[i] & ~m5k.f .ctl._ctl_mvldx_m1.q[i] & !m5k.f .ctl._ctl_mvldx_m1.cond & ((m5k.f .ctl.alive & m5k.f .ctl.alive_m1))} report "fondNoRise: m5kc_fcl._ctl_mvldx_m1";        psl cover { ~m5k.f .ctl._ctl_mvldx_m1.d[i] &  m5k.f .ctl._ctl_mvldx_m1.q[i] & !m5k.f .ctl._ctl_mvldx_m1.cond & ((m5k.f .ctl.alive & m5k.f .ctl.alive_m1))} report "fondNoFall: m5kc_fcl._ctl_mvldx_m1";     end endgenerate	
 
 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+
+begin addr <= (({regs[6], regs[7]} + 1)); rd <= 1; end and begin addr <= (({regs[6], regs[7]})); wdata <= (rdata); wr <= 1; end
+begin addr <= ({regs[6], regs[7]} + 1); rd <= 1; end
+begin addr <= ({regs[6], regs[7]}); wdata <= (rdata); wr <= 1; end 
+
+
 
 
  
  
    
 
-`line 117 "t/t_preproc.v" 0
+`line 130 "t/t_preproc.v" 0
 
-Line_Preproc_Check 118
-`line 119 "t/t_preproc.v" 2
+Line_Preproc_Check 131
+`line 132 "t/t_preproc.v" 2
diff --git a/test_regress/t/t_preproc.v b/test_regress/t/t_preproc.v
index 05718830f..cee0b2e03 100644
--- a/test_regress/t/t_preproc.v
+++ b/test_regress/t/t_preproc.v
@@ -108,6 +108,19 @@ assign c = tmp_``c ;
 
    `check(m5kc_fcl, 3, _ctl_mvldx_m1, `CK_fr,	`MF._ctl_mvldx_m1)	// ignorecmt
 
+// macro call with define that has comma
+`define REG_H   6
+`define REG_L   7
+`define _H      regs[`REG_H]
+`define _L      regs[`REG_L]
+`define _HL     {`_H, `_L}
+`define EX_WRITE(ad, da)      begin addr <= (ad); wdata <= (da); wr <= 1; end
+`define EX_READ(ad)           begin addr <= (ad); rd <= 1; end
+
+`EX_READ((`_HL + 1)) and `EX_WRITE((`_HL), rdata)
+`EX_READ(`_HL + 1)
+`EX_WRITE(`_HL, rdata) 
+
 //===========================================================================
 // Ifdef