Remove SystemPerl tests

This commit is contained in:
Wilson Snyder 2014-11-27 08:30:54 -05:00
parent cb645c9a74
commit 9837b40330
17 changed files with 20 additions and 472 deletions

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@ -9,6 +9,8 @@ indicates the contributor was also the author of the fix; Thanks!
** PSL support was removed, please use System Verilog assertions.
** SystemPerl mode is deprecated and now untested.
* Verilator 3.866 2014-11-15

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@ -100,7 +100,7 @@ PACKAGE_VERSION = @PACKAGE_VERSION@
SHELL = /bin/sh
SUBDIRS = src test_verilated test_c test_sc test_sp test_regress
SUBDIRS = src test_verilated test_c test_sc test_regress
INFOS = README README.html README.pdf internals.txt internals.html \
internals.pdf verilator.txt verilator.html verilator.1 verilator.pdf
@ -183,9 +183,9 @@ msg_test: all_nomsg
.PHONY:test
ifeq ($(CFG_WITH_LONGTESTS),yes) # Local... Else don't burden users
test: test_c test_sc test_sp test_verilated test_regress
test: test_c test_sc test_verilated test_regress
else
test: test_c test_sc test_sp
test: test_c test_sc
endif
@echo "Tests passed!"
@echo
@ -200,10 +200,6 @@ test_sc: all_nomsg
@(cd test_sc && $(MAKE))
test_sc_debug: all_nomsg
@(cd test_sc && $(MAKE) test_debug)
test_sp: all_nomsg
@(cd test_sp && $(MAKE))
test_sp_debug: all_nomsg
@(cd test_sp && $(MAKE) test_debug)
test_verilated: all_nomsg
@(cd test_verilated && $(MAKE))
test_regress: all_nomsg
@ -283,7 +279,6 @@ VL_INST_DATA_SRCDIR_FILES = \
test_v/*.[chv]* \
test_c/*.[chv]* test_c/Makefile test_c/Makefile_obj \
test_sc/*.[chv]* test_sc/Makefile test_sc/Makefile_obj \
test_sp/Makefile test_sp/Makefile_obj \
installbin:
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(bindir)
@ -315,7 +310,6 @@ installdata:
done
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_c
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_sc
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_sp
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples/test_v
cd $(srcdir) \
; for p in $(VL_INST_DATA_SRCDIR_FILES) ; do \

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@ -204,17 +204,13 @@ Verilator - Convert Verilog code to C++/SystemC
=head1 DESCRIPTION
Verilator converts synthesizable (not behavioral) Verilog code, plus some
Synthesis, SystemVerilog and a small subset of Verilog AMS
assertions, into C++, SystemC or SystemPerl code. It is not a complete
simulator, just a compiler.
Synthesis, SystemVerilog and a small subset of Verilog AMS assertions, into
C++ or SystemC code. It is not a complete simulator, but a compiler.
Verilator is invoked with parameters similar to GCC, Cadence
Verilog-XL/NC-Verilog, or Synopsys's VCS. It reads the specified Verilog
code, lints it, and optionally adds coverage and waveform tracing code.
For C++ and SystemC formats, it outputs .cpp and .h files. For SystemPerl
format, it outputs .sp files for the SystemPerl preprocessor, which greatly
simplifies writing SystemC code and is available at
L<http://www.veripool.org>.
For C++ and SystemC formats, it outputs .cpp and .h files.
The files created by Verilator are then compiled with C++. The user writes
a little C++ wrapper file, which instantiates the top level module, and
@ -311,7 +307,6 @@ descriptions in the next sections for more information.
--report-unoptflat Extra diagnostics for UNOPTFLAT
--savable Enable model save-restore
--sc Create SystemC output
--sp Create SystemPerl output
--stats Create statistics file
-sv Enable SystemVerilog parsing
+systemverilogext+<ext> Synonym for +1800-2012ext+<ext>
@ -447,7 +442,7 @@ run on the generated makefile these will be passed to the C++ compiler
=item --cc
Specifies C++ without SystemC output mode; see also --sc and --sp.
Specifies C++ without SystemC output mode; see also --sc.
=item --cdc
@ -964,11 +959,7 @@ other data the process needs saved/restored. For example:
=item --sc
Specifies SystemC output mode; see also --cc and -sp.
=item --sp
Specifies SystemPerl output mode; see also --cc and -sc.
Specifies SystemC output mode; see also --cc.
=item --stats
@ -1435,11 +1426,6 @@ For -cc and -sc mode, it also creates:
{prefix}{each_verilog_module}.cpp // Lower level internal C++ files
{prefix}{each_verilog_module}.h // Lower level internal header files
For -sp mode, instead of .cpp and .h it creates:
{prefix}.sp // Top level SystemC file
{prefix}{each_verilog_module}.sp // Lower level internal SC files
In certain optimization modes, it also creates:
{prefix}__Dpi.h // DPI import and export declarations
@ -1514,21 +1500,6 @@ specified, it will come from a default optionally specified at configure
time (before Verilator was compiled), or computed from
SYSTEMC/lib-SYSTEMC_ARCH.
=item SYSTEMPERL
Specifies the directory containing the SystemPerl distribution kit. This
is used to find the SystemPerl library and include files. If not
specified, it will come from a default optionally specified at configure
time (before Verilator was compiled). See also SYSTEMPERL_INCLUDE.
=item SYSTEMPERL_INCLUDE
Specifies the directory containing the Verilog-Perl include .cpp files,
from the src/ directory of the SystemPerl kit. If not specified, it will
be computed from the SYSTEMPERL environment variable if it is set, and if
SYSTEMPERL is not set SYSTEMPERL_INCLUDE will come from a default
optionally specified at configure time (before Verilator was compiled).
=item VCS_HOME
If set, specifies the directory containing the Synopsys VCS distribution.

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@ -635,7 +635,6 @@ INPUT = doxygen-mainpage \
test_c \
test_regress \
test_sc \
test_sp \
test_v \
test_verilated

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@ -473,10 +473,10 @@ be warning free.
=item --enable-longtests
In addition to the standard C, SystemC and SystemPerl tests also run the
tests in the C<test_verilated> and C<test_regress> directories
when using I<make test>. This is disabled by default as SystemC/SystemPerl
installation problems would otherwise falsely indicate a Verilator problem.
In addition to the standard C, SystemC tests also run the tests in the
C<test_verilated> and C<test_regress> directories when using I<make test>.
This is disabled by default as SystemC installation problems would
otherwise falsely indicate a Verilator problem.
=back
@ -491,12 +491,6 @@ There are some traps to avoid when running regression tests
=item *
The regression tests will assume that you have a version of SystemPerl to
match. Typically if working on Verilator from git, also use SystemPerl from
git.
=item *
When checking the MANIFEST, the test will barf on unexpected code in the
Verilator tree. So make sure to keep any such code outside the tree.

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@ -1,145 +0,0 @@
#!/usr/bin/perl -w
######################################################################
#
# Copyright 2010-2014 by Wilson Snyder. This package is free software; you
# can redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
######################################################################
# DESCRIPTION: Diff Verilator includes against SystemPerl include files
use Getopt::Long;
use IO::File;
use strict;
our $Debug;
our $Bad;
if (! GetOptions (
#"help" => \&usage,
"debug" => sub { $Debug = 1; },
)) {
die "usage();"
}
diff("$ARGV[0]/include/verilated_vcd_c.h", "$ARGV[1]/src/SpTraceVcdC.h");
diff("$ARGV[0]/include/verilated_vcd_sc.h", "$ARGV[1]/src/SpTraceVcd.h");
diff("$ARGV[0]/include/verilated_vcd_c.cpp", "$ARGV[1]/src/SpTraceVcdC.cpp");
diff("$ARGV[0]/include/verilated_vcd_sc.cpp", "$ARGV[1]/src/SpTraceVcd.cpp");
exit(10) if $Bad;
sub diff {
my $a=shift;
my $b=shift;
my $ta = "/tmp/spdiff.$$.a";
my $tb = "/tmp/spdiff.$$.b";
prep($a,$ta);
prep($b,$tb);
system("diff -u -w $ta $tb");
}
sub prep {
my $filename = shift;
my $wfilename = shift;
my $sp;
if ($filename =~ m!src/Sp!) {
$sp = "Sp";
} elsif ($filename =~ m!include/verilated!) {
} else {
die "%Error: Not sure if Sp/Verilated: $filename,\n";
}
my $fh = IO::File->new("<$filename") or die "%Error: $! $filename";
my $fho = IO::File->new(">$wfilename") or die "%Error: $! writing $wfilename";
my @wf;
my $off;
while (defined(my $line = $fh->getline)) {
if ($line =~ m!// *SPDIFF_OFF!) {
$off = 1;
next;
} elsif ($line =~ m!// *SPDIFF_ON!) {
$off = 0;
next;
}
next if $off;
next if $line =~ /compile-command:/;
$line =~ s/SP_ABORT.*// if $sp;
$line =~ s/SP_NOTICE.*// if $sp;
$line =~ s/vl_fatal.*// if !$sp;
$line =~ s/VL_PRINT.*// if !$sp;
$line =~ s/Copyright \d+-\d+/Copyright #-#/g;
push @wf, $line;
my $check = $line;
$check =~ s/\bspace//i;
$check =~ s/\bsplit//i;
$check =~ s/"SP_TRACE"//;
if ($sp && $check =~ /Verilat/i
&& $check !~ /and newer/) {
warn "%Warning: $filename:$.: Verilator text in Sp version: $line";
$Bad = 1;
} elsif (!$sp && $check =~ /\b(Sp|SP)/
) {
warn "%Warning: $filename:$.: Sp text in Verilator version: $line";
$Bad = 1;
} elsif (!$sp && $check =~ /\<uint[0-9]+_t/) {
warn "%Warning: $filename:$.: uint in Verilator version: $line";
$Bad = 1;
}
}
!$off or die "%Error: $filename: SPDIFF_OFF block never terminated\n";
my $wholefile = join('',@wf);
if ($sp) {
$wholefile =~ s/SPTRACEVCDC_VERSION/VERILATED_VCD_VERSION/g;
$wholefile =~ s/SPTRACEVCDC_/VERILATED_VCD_C_/g;
$wholefile =~ s/SPTRACEVCD_TEST/VERILATED_VCD_TEST/g;
$wholefile =~ s/SPTRACEVCD_/VERILATED_VCD_SC_/g;
#
$wholefile =~ s/\bSpTraceFile\b/VerilatedVcdSc/g;
$wholefile =~ s/\bSpTraceFileC\b/VerilatedVcdC/g;
$wholefile =~ s/\bSpTraceVcd\b/VerilatedVcd/g;
$wholefile =~ s/\bSpTraceVcdCFile\b/VerilatedVcdC/g;
#
$wholefile =~ s/\bSpTraceCallInfo\b/VerilatedVcdCallInfo/g;
$wholefile =~ s/\bSpTraceCallback_t/VerilatedVcdCallback_t/g;
$wholefile =~ s/\bSpTraceVcd_/VerilatedVcd_/g;
$wholefile =~ s/\bSpTraceVcdSig\b/VerilatedVcdSig/g;
$wholefile =~ s/\bSpScBvExposer/VlScBvExposer/g;
#
$wholefile =~ s/Each SystemPerl module/Each module/g;
$wholefile =~ s/\bSystemPerl [Tt]race file being created/Trace file being created/g;
$wholefile =~ s/\bSystemPerl [Tt]rac/Verilator trac/g; # trace/tracing
#
$wholefile =~ s/\b(uint[0-9]+_t)/vl$1/g;
$wholefile =~ s/%ll/%" VL_PRI64 "/g;
$wholefile =~ s/\(long long unsigned\)n/ n/g; # printQuad
#
$wholefile =~ s/\bSP_SC_BV/VL_SC_BV/g;
$wholefile =~ s/\bSP_UNLIKELY/VL_UNLIKELY/g;
}
$fho->print($wholefile);
}
# Local Variables:
# compile-command: "./spdiff $SYP $V4"
# End:

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@ -76,14 +76,6 @@ instead.)
=item
If you will be using SystemPerl or coverage, download and install
System-Perl, L<http://www.veripool.org/systemperl>. Note you'll need to
set a C<SYSTEMPERL> environment variable to point to the downloaded kit.
Optionally also set C<SYSTEMPERL_INCLUDE> to point to the installed
headers.
=item
You will need the C<flex> and C<bison> packages installed.
=item
@ -95,8 +87,8 @@ C<cd> to the Verilator directory containing this README.
You now have to decide how you're going to eventually install the kit.
Note Verilator builds the current value of VERILATOR_ROOT, SYSTEMC_INCLUDE,
SYSTEMC_LIBDIR, SYSTEMPERL, and SYSTEMPERL_INCLUDE as defaults into the
executable, so try to have them correct before configuring.
and SYSTEMC_LIBDIR as defaults into the executable, so try to have them
correct before configuring.
=over 4
@ -198,7 +190,6 @@ The directories in the kit after de-taring are as follows:
test_v => Example Verilog code for other test dirs
test_c => Example Verilog->C++ conversion
test_sc => Example Verilog->SystemC conversion
test_sp => Example Verilog->SystemPerl conversion
test_verilated => Internal tests
test_regress => Internal tests

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@ -759,7 +759,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
else if ( onoff (sw, "-savable", flag/*ref*/) ) { m_savable = flag; }
else if ( !strcmp (sw, "-sc") ) { m_outFormatOk = true; m_systemC = true; m_systemPerl = false; }
else if ( onoff (sw, "-skip-identical", flag/*ref*/) ) { m_skipIdentical = flag; }
else if ( !strcmp (sw, "-sp") ) { m_outFormatOk = true; m_systemC = true; m_systemPerl = true; }
else if ( !strcmp (sw, "-sp-deprecated") ) { m_outFormatOk = true; m_systemC = true; m_systemPerl = true; } // Undocumented, old
else if ( onoff (sw, "-stats", flag/*ref*/) ) { m_stats = flag; }
else if ( !strcmp (sw, "-sv") ) { m_defaultLanguage = V3LangCode::L1800_2005; }
else if ( onoff (sw, "-trace", flag/*ref*/) ) { m_trace = flag; }

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@ -630,7 +630,7 @@ int main(int argc, char** argv, char** env) {
&& !v3Global.opt.lintOnly()
&& !v3Global.opt.xmlOnly()
&& !v3Global.opt.cdc()) {
v3fatal("verilator: Need --cc, --sc, --sp, --cdc, --lint-only, --xml_only or --E option");
v3fatal("verilator: Need --cc, --sc, --cdc, --lint-only, --xml_only or --E option");
}
// Check environment
V3Options::getenvSYSTEMC();

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@ -1,24 +0,0 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
top_filename("t/t_cover_line.v");
compile (
verilator_flags2 => ['--sp --coverage-line'],
);
execute (
check_finished=>1,
);
# Read the input .v file and do any CHECK_COVER requests
inline_checks();
ok(1);
1;

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@ -1,23 +0,0 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2010 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
my $root = "..";
if (!-r "$root/.git") {
$Self->skip("Not in a git repository");
} else {
my $cmd = "cd $root && nodist/spdiff . $ENV{SYSTEMPERL}";
my $grep = `$cmd`;
print "$grep\n";
if ($grep ne "") {
$Self->error("Include mismatches SystemPerl src\n");
}
}
ok(1);
1;

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@ -1,26 +0,0 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
top_filename("t/t_trace_ena.v");
compile (
verilator_flags2 => ['-trace -sp'],
);
execute (
check_finished=>1,
);
if ($Self->{vlt}) {
# Note more checks in _cc.pl
file_grep ("$Self->{obj_dir}/simx.vcd", qr/\$enddefinitions/x);
}
ok(1);
1;

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@ -1,25 +0,0 @@
#!/usr/bin/perl
if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
# DESCRIPTION: Verilator: Verilog Test driver/expect definition
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
top_filename("t/t_trace_ena.v");
compile (
verilator_flags2 => ['-notrace -sp'],
);
execute (
check_finished=>1,
);
if ($Self->{vlt}) {
!-r "$Self->{obj_dir}/simx.vcd" or $Self->error("Tracing should be off\n");
}
ok(1);
1;

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@ -12,15 +12,8 @@
#include <sys/times.h>
#include <sys/stat.h>
#ifdef SYSTEMPERL
# include "systemperl.h" // SystemC + SystemPerl global header
# include "sp_log.h" // Logging cout to files
# include "SpTraceVcd.h"
# include "SpCoverage.h"
#else
# include "systemc.h" // SystemC global header
# include "verilated_vcd_sc.h" // Tracing
#endif
#include "systemc.h" // SystemC global header
#include "verilated_vcd_sc.h" // Tracing
#include "Vtop.h" // Top level header, generated from verilog
@ -33,10 +26,6 @@ int sc_main(int argc, char* argv[]) {
// General logfile
ios::sync_with_stdio();
#ifdef SYSTEMPERL
sp_log_file simlog ("sim.log");
simlog.redirect_cout();
#endif
// Defaults
#if (SYSTEMC_VERSION>20011000)
@ -70,19 +59,6 @@ int sc_main(int argc, char* argv[]) {
//==========
// Part under test
#ifdef SYSTEMPERL
SP_CELL (top, Vtop);
SP_PIN (top, clk, clk);
SP_PIN (top, fastclk, fastclk);
SP_PIN (top, reset_l, reset_l);
SP_PIN (top, passed, passed);
SP_PIN (top, in_small, in_small);
SP_PIN (top, in_quad, in_quad);
SP_PIN (top, in_wide, in_wide);
SP_PIN (top, out_small, out_small);
SP_PIN (top, out_quad, out_quad);
SP_PIN (top, out_wide, out_wide);
#else
Vtop* top = new Vtop("top");
top->clk (clk);
top->fastclk (fastclk);
@ -94,7 +70,6 @@ int sc_main(int argc, char* argv[]) {
top->out_small (out_small);
top->out_quad (out_quad);
top->out_wide (out_wide);
#endif
//==========
// Waves
@ -119,11 +94,7 @@ int sc_main(int argc, char* argv[]) {
#if VM_TRACE
cout << "Enabling waves...\n";
# ifdef SYSTEMPERL
SpTraceFile* tfp = new SpTraceFile;
# else
VerilatedVcdSc* tfp = new VerilatedVcdSc;
# endif
top->trace (tfp, 99);
tfp->open ("vlt_dump.vcd");
#endif

8
test_sp/.gitignore vendored
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@ -1,8 +0,0 @@
*.old
*.dmp
*.log
*.csrc
*.vcd
obj_*
logs
project

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@ -1,86 +0,0 @@
#*****************************************************************************
#
# DESCRIPTION: Verilator Example: Makefile for inside source directory
#
# This calls the object directory makefile. That allows the objects to
# be placed in the "current directory" which simplifies the Makefile.
#
# Copyright 2003-2014 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
#
#****************************************************************************/
default: test_default
# This must point to the root of the VERILATOR kit
VERILATOR_ROOT := $(shell pwd)/..
export VERILATOR_ROOT
# Pick up PERL and other variable settings
include $(VERILATOR_ROOT)/include/verilated.mk
DEBUG_ON = --debug --trace-dups
######################################################################
ifneq ($(SYSTEMPERL),)
test_default: precopy prep preproc compile run
test_debug: precopy prep_dbg preproc compile_dbg run
test_nopublic: precopy prep_dbg_np preproc compile_dbg run
else
test_default: nosp
test_debug: nosp
test_nopublic: nosp
endif
V_FLAGS = -f $(VERILATOR_ROOT)/test_v/input.vc
# Note the --public --output-split-cfunc is here for testing only,
# Avoid using these settings in real application Makefiles!
VERILATOR_FLAGS = --public --output-split-cfuncs 1000 --output-split 1000 \
--sp --stats --trace $(V_FLAGS) top.v
precopy: obj_dir obj_dir/sc_main.cpp
obj_dir/sc_main.cpp: ../test_sc/sc_main.cpp
mkdir -p obj_dir
cp $^ $@
prep:
$(PERL) $(VERILATOR_ROOT)/bin/verilator $(VERILATOR_FLAGS)
prep_dbg:
$(PERL) $(VERILATOR_ROOT)/bin/verilator $(DEBUG_ON) $(VERILATOR_FLAGS)
prep_dbg_np:
$(PERL) $(VERILATOR_ROOT)/bin/verilator $(DEBUG_ON) $(VERILATOR_FLAGS) --nopublic
preproc:
cd obj_dir ; $(MAKE) -j 1 -f ../Makefile_obj preproc
compile:
cd obj_dir ; $(MAKE) -j 3 -f ../Makefile_obj
compile_dbg:
cd obj_dir ; $(MAKE) OPT=-g -j 3 -f ../Makefile_obj
run:
obj_dir/simx
coverage:
$(VERILATOR_ROOT)/bin/verilator_coverage $(V_FLAGS)
######################################################################
obj_dir:
mkdir $@
nosp:
@echo
@echo %Skip: SYSTEMPERL not in environment
@echo
######################################################################
maintainer-copy::
clean mostlyclean distclean maintainer-clean::
-rm -rf obj_dir *.log *.dmp *.vpd *.vcd core logs

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@ -1,37 +0,0 @@
# -*- Makefile -*-
#*****************************************************************************
#
# DESCRIPTION: Verilator Example: Makefile for inside object directory
#
# This is executed in the object directory, and called by ../Makefile
#
# Copyright 2003-2014 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License Version 3 or the Perl Artistic License
# Version 2.0.
#
#*****************************************************************************
default: simx
include Vtop.mk
#######################################################################
# Use sp_log.cpp, so we can get output in sim.log
CPPFLAGS += -DUTIL_PRINTF=sp_log_printf
CPPFLAGS += -Wno-deprecated
CPPFLAGS += $(SYSTEMC_CXX_FLAGS)
CPPFLAGS += $(OPT)
LDFLAGS += $(SYSTEMC_CXX_FLAGS)
#######################################################################
# Linking final exe -- presumes have a sim_main.cpp
SC_LIB = $(SYSTEMC_LIBDIR)/libsystemc.a
simx: sc_main.o $(VK_GLOBAL_OBJS) \
$(VM_PREFIX)__ALL.a $(SC_LIB)
$(LINK) $(LDFLAGS) -g $^ $(LOADLIBES) $(LDLIBS) -o $@ $(SC_LIBS) $(LIBS) 2>&1 | c++filt
sc_main.o: sc_main.cpp $(VM_PREFIX).h