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For generated variables, opt towards 2-state so zero init

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This commit is contained in:
Wilson Snyder 2012-01-26 08:29:55 -05:00
parent af9e85bda1
commit 8f40d6617e
7 changed files with 21 additions and 7 deletions
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1
src/V3Ast.h
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@ -36,6 +36,7 @@
// Hint class so we can choose constructors
class AstLogicPacked {};
class AstBitPacked {};
//######################################################################

13
src/V3AstNodes.h
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@ -254,6 +254,11 @@ public:
init(AstBasicDTypeKwd::LOGIC, signedst_NOP,
((wantwidth > 1) ? new AstRange(fl, wantwidth-1, 0) : NULL));
}
AstBasicDType(FileLine* fl, AstBitPacked, int wantwidth)
: AstNodeDType(fl) {
init(AstBasicDTypeKwd::BIT, signedst_NOP,
((wantwidth > 1) ? new AstRange(fl, wantwidth-1, 0) : NULL));
}
// See also addRange in verilog.y
private:
void init(AstBasicDTypeKwd kwd, AstSignedState signst, AstRange* rangep) {
@ -626,6 +631,14 @@ public:
setOp1p(new AstBasicDType(fl, AstLogicPacked(), wantwidth));
width(wantwidth,0);
}
AstVar(FileLine* fl, AstVarType type, const string& name, AstBitPacked, int wantwidth)
:AstNode(fl)
, m_name(name) {
init();
combineType(type);
setOp1p(new AstBasicDType(fl, AstBitPacked(), wantwidth));
width(wantwidth,0);
}
AstVar(FileLine* fl, AstVarType type, const string& name, AstVar* examplep)
:AstNode(fl)
, m_name(name) {

4
src/V3Delayed.cpp
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@ -133,8 +133,8 @@ private:
if (width==0) {
varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, oldvarscp->varp());
varp->widthSignedFrom(oldvarscp);
} else {
varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, AstLogicPacked(), width);
} else { // Used for vset and dimensions, so can zero init
varp = new AstVar (oldvarscp->fileline(), AstVarType::BLOCKTEMP, name, AstBitPacked(), width);
}
addmodp->addStmtp(varp);
m_modVarMap.insert(make_pair(make_pair(addmodp, name), varp));

2
src/V3EmitC.cpp
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@ -1353,7 +1353,7 @@ void EmitCImp::emitVarResets(AstNodeModule* modp) {
puts(varp->name());
for (int v=0; v<vects; ++v) puts( "[__Vi"+cvtToStr(v)+"]");
if (zeroit) {
puts("= 0;\n");
puts(" = 0;\n");
} else {
puts(" = VL_RAND_RESET_");
emitIQW(varp);

2
src/V3LinkJump.cpp
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@ -139,7 +139,7 @@ private:
string name = string("__Vrepeat")+cvtToStr(m_repeatNum++);
// Spec says value is integral, if negative is ignored
AstVar* varp = new AstVar(nodep->fileline(), AstVarType::BLOCKTEMP, name,
AstLogicPacked(), 32);
AstBitPacked(), 32);
varp->numeric(AstNumeric::SIGNED);
varp->dtypep()->numeric(AstNumeric::SIGNED);
varp->usedLoopIdx(true);

4
src/V3Table.cpp
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@ -182,7 +182,7 @@ private:
// Index into our table
AstVar* indexVarp = new AstVar (nodep->fileline(), AstVarType::BLOCKTEMP,
"__Vtableidx" + cvtToStr(m_modTables),
AstLogicPacked(), m_inWidth);
AstBitPacked(), m_inWidth);
m_modp->addStmtp(indexVarp);
AstVarScope* indexVscp = new AstVarScope (indexVarp->fileline(), m_scopep, indexVarp);
m_scopep->addVarp(indexVscp);
@ -193,7 +193,7 @@ private:
= new AstVar (fl, AstVarType::MODULETEMP,
"__Vtablechg" + cvtToStr(m_modTables),
new AstArrayDType (fl,
new AstBasicDType(fl, AstLogicPacked(), m_outVarps.size()),
new AstBasicDType(fl, AstBitPacked(), m_outVarps.size()),
new AstRange (fl, VL_MASK_I(m_inWidth), 0)));
chgVarp->isConst(true);
chgVarp->valuep(new AstInitArray (nodep->fileline(), NULL));

2
src/V3Trace.cpp
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@ -313,7 +313,7 @@ private:
if (!activityNumber) activityNumber++; // For simplicity, always create it
int activityBits = VL_WORDS_I(activityNumber)*VL_WORDSIZE; // For tighter code; round to next 32 bit point.
AstVar* newvarp = new AstVar (m_chgFuncp->fileline(), AstVarType::MODULETEMP,
"__Vm_traceActivity", AstLogicPacked(), activityBits);
"__Vm_traceActivity", AstBitPacked(), activityBits);
m_topModp->addStmtp(newvarp);
AstVarScope* newvscp = new AstVarScope(newvarp->fileline(), m_highScopep, newvarp);
m_highScopep->addVarp(newvscp);