From 8dae4ad93a0932d6c8c8031937fe0d09d716e5ac Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 18 Sep 2022 10:19:15 -0400 Subject: [PATCH] Tests: Rename to avoid dash. --- test_regress/t/t_flag_build_jobs_bad.pl | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100755 test_regress/t/t_flag_build_jobs_bad.pl diff --git a/test_regress/t/t_flag_build_jobs_bad.pl b/test_regress/t/t_flag_build_jobs_bad.pl new file mode 100755 index 000000000..8432e74c6 --- /dev/null +++ b/test_regress/t/t_flag_build_jobs_bad.pl @@ -0,0 +1,22 @@ +#!/usr/bin/env perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(vlt => 1); + +top_filename("t/t_flag_werror.v"); + +lint( + fails => 1, + verilator_flags => [qw(--build-jobs -1 --build)], + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1;