Add error on wait with missing .triggered. (#4457)

Changes

@@ -14,6 +14,7 @@ Verilator 5.031 devel
 **Minor:**
 
 * Add error on illegal enum base type (#3010). [Iztok Jeras]
+* Add error on `wait` with missing `.triggered` (#4457).
 * Add error when improperly storing to parameter (#5147). [Gökçe Aydos]
 * Add coverage point hierarchy to coverage reports (#5575) (#5576). [Andrew Nolte]
 * Fix can't locate scope error in interface task delayed assignment (#5462) (#5568). [Zhou Shen]

src/V3Width.cpp

@@ -6131,6 +6131,15 @@ class WidthVisitor final : public VNVisitor {
             if (v3Global.opt.timing().isSetTrue()) {
                 iterateCheckBool(nodep, "Wait", nodep->condp(),
                                  BOTH);  // it's like an if() condition.
+                // TODO check also inside complex event expressions
+                if (AstNodeVarRef* const varrefp = VN_CAST(nodep->condp(), NodeVarRef)) {
+                    if (varrefp->isEvent()) {
+                        varrefp->v3error("Wait statement conditions do not take raw events"
+                                         " (IEEE 1800-2023 15.5.3)\n"
+                                         << varrefp->warnMore() << "... Suggest use '"
+                                         << varrefp->prettyName() << ".triggered'");
+                    }
+                }
                 iterateNull(nodep->stmtsp());
                 return;
             } else if (v3Global.opt.timing().isSetFalse()) {

test_regress/t/t_wait_no_triggered_bad.out

@@ -0,0 +1,6 @@
+%Error: t/t_wait_no_triggered_bad.v:15:12: Wait statement conditions do not take raw events (IEEE 1800-2023 15.5.3)
+                                         : ... note: In instance 't'
+                                         : ... Suggest use 'e_my_event.triggered'
+   15 |       wait(e_my_event);   
+      |            ^~~~~~~~~~
+%Error: Exiting due to

test_regress/t/t_wait_no_triggered_bad.py

@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint(verilator_flags2=['--timing'], fails=True, expect_filename=test.golden_filename)
+
+test.passes()

test_regress/t/t_wait_no_triggered_bad.v

@@ -0,0 +1,21 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2024 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+
+   event e_my_event;
+
+   initial begin
+      #(1us);
+      wait(e_my_event.triggered);  // Ok
+      #(1us);
+      wait(e_my_event);  // Bad
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule