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Internals: Realign flex with Verilog-Perl version

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This commit is contained in:
Wilson Snyder 2009-10-30 23:17:56 -04:00
parent 26eb7c9375
commit 7b4d2118ea
5 changed files with 77 additions and 73 deletions
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7
nodist/flexdiff
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@ -48,7 +48,10 @@ sub prep {
while (defined(my $line = $fh->getline)) { while (defined(my $line = $fh->getline)) {
# Productions # Productions
$line =~ s/[ \t]{[^}]*?}/\t{}/g; #$line =~ s/[ \t]{[^}]*?}/\t{}/g;
$line =~ s/StashPrefix;//g;
$line =~ s/VALTEXT;//g;
$line =~ s/CALLBACK\([^)]*\);//g;
push @lines, $line; push @lines, $line;
} }
@ -57,5 +60,5 @@ sub prep {
} }
# Local Variables: # Local Variables:
# compile-command: "./flexdiff $WUP/Verilog/Parser/VParseLex.l ../src/verilog.l" # compile-command: "./flexdiff $VP/Parser/VParseLex.l ../src/verilog.l"
# End: # End:

2
src/V3Read.cpp
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@ -191,6 +191,8 @@ bool V3Read::optFuture(const string& flag) {
int V3Read::yylexThis() { int V3Read::yylexThis() {
int token = m_lexerp->yylex(); int token = m_lexerp->yylex();
// Match verilog-perl names
if (token == yaID__LEX) { token = yaID__ETC; }
UINFO(5,m_fileline<<" TOKEN="<<dec<<token<<" "<<endl); UINFO(5,m_fileline<<" TOKEN="<<dec<<token<<" "<<endl);
return (token); return (token);
} }

3
src/flexfix
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@ -26,5 +26,8 @@ foreach my $line (<STDIN>) {
$line =~ s!\(void\) *fwrite\((.*)\)!if (fwrite($1)) {}!g; $line =~ s!\(void\) *fwrite\((.*)\)!if (fwrite($1)) {}!g;
# Fix flex 2.5.33 and GCC 4.1.2 "warning: comparison between signed and unsigned integer expressions" in YY_INPUT # Fix flex 2.5.33 and GCC 4.1.2 "warning: comparison between signed and unsigned integer expressions" in YY_INPUT
$line =~ s!for \( n = 0; n < max_size && !for ( n = 0; ((size_t)n < (size_t)max_size) && !g; $line =~ s!for \( n = 0; n < max_size && !for ( n = 0; ((size_t)n < (size_t)max_size) && !g;
# Fix flex 2.5.4 and GCC 4.0.2 under FLEX_DEBUG
$line =~ s!--accepting rule at line %d !--accepting rule at line %ld !g;
print "$line"; print "$line";
} }

102
src/verilog.l
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@ -244,18 +244,18 @@ escid \\[^ \t\f\r\n]+
"xnor" { FL; return yXNOR; } "xnor" { FL; return yXNOR; }
"xor" { FL; return yXOR; } "xor" { FL; return yXOR; }
/* Special errors */ /* Special errors */
"$displayb" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $display with %%b format instead: %s",yytext); } "$displayb" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $display with %%b format instead: %s",yytext); }
"$displayh" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $display with %%x format instead: %s",yytext); } "$displayh" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $display with %%x format instead: %s",yytext); }
"$displayo" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $display with %%o format instead: %s",yytext); } "$displayo" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $display with %%o format instead: %s",yytext); }
"$fdisplayb" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fdisplay with %%b format instead: %s",yytext); } "$fdisplayb" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fdisplay with %%b format instead: %s",yytext); }
"$fdisplayh" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fdisplay with %%x format instead: %s",yytext); } "$fdisplayh" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fdisplay with %%x format instead: %s",yytext); }
"$fdisplayo" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fdisplay with %%o format instead: %s",yytext); } "$fdisplayo" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fdisplay with %%o format instead: %s",yytext); }
"$fwriteb" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fwrite with %%b format instead: %s",yytext); } "$fwriteb" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fwrite with %%b format instead: %s",yytext); }
"$fwriteh" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fwrite with %%x format instead: %s",yytext); } "$fwriteh" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fwrite with %%x format instead: %s",yytext); }
"$fwriteo" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fwrite with %%o format instead: %s",yytext); } "$fwriteo" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $fwrite with %%o format instead: %s",yytext); }
"$writeb" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $write with %%b format instead: %s",yytext); } "$writeb" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $write with %%b format instead: %s",yytext); }
"$writeh" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $write with %%x format instead: %s",yytext); } "$writeh" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $write with %%x format instead: %s",yytext); }
"$writeo" { RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $write with %%o format instead: %s",yytext); } "$writeo" { FL; RETURN_BBOX_SYS_OR_MSG("Unsupported: Use $write with %%o format instead: %s",yytext); }
/* Generic unsupported warnings */ /* Generic unsupported warnings */
"cmos" { yyerrorf("Unsupported: Verilog 1995 reserved word not implemented: %s",yytext); } "cmos" { yyerrorf("Unsupported: Verilog 1995 reserved word not implemented: %s",yytext); }
"deassign" { yyerrorf("Unsupported: Verilog 1995 reserved word not implemented: %s",yytext); } "deassign" { yyerrorf("Unsupported: Verilog 1995 reserved word not implemented: %s",yytext); }
@ -644,8 +644,8 @@ escid \\[^ \t\f\r\n]+
"~&" { FL; return yP_NAND; } "~&" { FL; return yP_NAND; }
"~|" { FL; return yP_NOR; } "~|" { FL; return yP_NOR; }
"->" { FL; return yP_MINUSGT; } "->" { FL; return yP_MINUSGT; }
"=>" { FL; return yP_EQGT; } "=>" { FL; return yP_EQGT; }
"*>" { FL; return yP_ASTGT; } "*>" { FL; return yP_ASTGT; }
"&&&" { FL; return yP_ANDANDAND; } "&&&" { FL; return yP_ANDANDAND; }
} }
@ -710,71 +710,67 @@ escid \\[^ \t\f\r\n]+
/* Identifiers and numbers */ /* Identifiers and numbers */
<V95,V01,V05,S05,PSL>{ <V95,V01,V05,S05,PSL>{
{escid} { yylval.strp = V3Read::newString {escid} { FL; yylval.strp = V3Read::newString
(AstNode::encodeName(string(yytext+1))); // +1 to skip the backslash (AstNode::encodeName(string(yytext+1))); // +1 to skip the backslash
return yaID__ETC; return yaID__LEX;
} }
{id} { FL; yylval.strp = V3Read::newString(AstNode::encodeName(string(yytext)));
{id} { yylval.strp = V3Read::newString(AstNode::encodeName(string(yytext))); return yaID__LEX;
return yaID__ETC;
} }
\"[^\"\\]*\" { FL; yylval.strp = V3Read::newString(yytext+1,yyleng-2);
\"[^\"\\]*\" { yylval.strp = V3Read::newString(yytext+1,yyleng-2);
return yaSTRING; return yaSTRING;
} }
\" { yy_push_state(STRING); yymore(); } \" { yy_push_state(STRING); yymore(); }
[0-9]*?['']s?[bcodhBCODH][ \t]*[A-Fa-f0-9xXzZ_?]* { [0-9]*?['']s?[bcodhBCODH][ \t]*[A-Fa-f0-9xXzZ_?]* {
yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext); FL; yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext);
return yaINTNUM; return yaINTNUM;
} }
[0-9]*?['']s?[01xXzZ] { /* SystemVerilog */ [0-9]*?['']s?[01xXzZ] { /* SystemVerilog */
yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext); FL; yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext);
return yaINTNUM; return yaINTNUM;
} }
/* Note below is constructed to not match the ' that begins a '( or '{ */ /* Note below is constructed to not match the ' that begins a '( or '{ */
[0-9][_0-9]*[ \t]*['']s?[bcodhBCODH]?[ \t]*[A-Fa-f0-9xXzZ_?]+ { [0-9][_0-9]*[ \t]*['']s?[bcodhBCODH]?[ \t]*[A-Fa-f0-9xXzZ_?]+ {
yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext); FL; yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext);
return yaINTNUM; return yaINTNUM;
} }
[0-9][_0-9]*[ \t]*['']s?[bcodhBCODH] { [0-9][_0-9]*[ \t]*['']s?[bcodhBCODH] {
yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext); FL; yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext);
return yaINTNUM; return yaINTNUM;
} }
[0-9][_0-9]*[ \t]*['']s { [0-9][_0-9]*[ \t]*['']s {
yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext); FL; yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext);
return yaINTNUM; return yaINTNUM;
} }
[0-9][_0-9]* { [0-9][_0-9]* {
yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext); FL; yylval.nump = V3Read::newNumber(V3Read::fileline(),(char*)yytext);
return yaINTNUM; return yaINTNUM;
} }
[0-9][_0-9]*(\.[_0-9]+)([eE][-+]?[_0-9]+)? { [0-9][_0-9]*(\.[_0-9]+)([eE][-+]?[_0-9]+)? {
yylval.cdouble = 0; /* Only for delays, not used yet */ FL; yylval.cdouble = 0; /* Only for delays, not used yet */
return yaFLOATNUM; return yaFLOATNUM;
} }
[0-9][_0-9]*(\.[_0-9]+)?([eE][-+]?[_0-9]+) { [0-9][_0-9]*(\.[_0-9]+)?([eE][-+]?[_0-9]+) {
yylval.cdouble = 0; /* Only for delays, not used yet */ FL; yylval.cdouble = 0; /* Only for delays, not used yet */
return yaFLOATNUM; return yaFLOATNUM;
} }
[0-9][_0-9]*(\.[_0-9]+)?(fs|ps|ns|us|ms|s|step) { [0-9][_0-9]*(\.[_0-9]+)?(fs|ps|ns|us|ms|s|step) {
yylval.cdouble = 0; /* Only for times, not used yet */ FL; yylval.cdouble = 0; /* Only for times, not used yet */
return yaTIMENUM; return yaTIMENUM;
} }
} }
/************************************************************************/ /************************************************************************/
/* STRINGS */ /* STRINGS */
<STRING>{crnl} { yyerrorf("Unterminated string"); } <STRING><<EOF>> { yyerrorf("EOF in unterminated string"); yyleng = 0; yy_pop_state(); }
<STRING>{crnl} { yyerrorf("Unterminated string"); NEXTLINE(); }
<STRING>\\{crnl} { yymore(); NEXTLINE(); } <STRING>\\{crnl} { yymore(); NEXTLINE(); }
<STRING>\\. { yymore(); } <STRING>\\. { yymore(); }
<STRING>\" { yy_pop_state(); <STRING>\" { yy_pop_state();
yylval.strp = V3Read::newString(yytext+1,yyleng-2); FL; yylval.strp = V3Read::newString(yytext+1,yyleng-2);
return yaSTRING; } return yaSTRING; }
<STRING>. { yymore(); } <STRING>. { yymore(); }
<STRING><<EOF>> { yyerrorf("EOF in string");
yyleng = 0; yy_pop_state(); }
/************************************************************************/ /************************************************************************/
/* Attributes */ /* Attributes */
@ -791,7 +787,7 @@ escid \\[^ \t\f\r\n]+
} }
/************************************************************************/ /************************************************************************/
/* Preprocessor*/ /* Preprocessor */
/* Common for all SYSC header states */ /* Common for all SYSC header states */
/* OPTIMIZE: we return one per line, make it one for the entire block */ /* OPTIMIZE: we return one per line, make it one for the entire block */
<V95,V01,V05,S05,PSL,SYSCHDR,SYSCINT,SYSCIMP,SYSCIMPH,SYSCCTOR,SYSCDTOR,IGNORE>{ <V95,V01,V05,S05,PSL,SYSCHDR,SYSCINT,SYSCIMP,SYSCIMPH,SYSCCTOR,SYSCDTOR,IGNORE>{
@ -799,6 +795,7 @@ escid \\[^ \t\f\r\n]+
"`autoexpand_vectornets" { } // Verilog-XL compatibility "`autoexpand_vectornets" { } // Verilog-XL compatibility
"`celldefine" { V3Read::inCellDefine(true); } "`celldefine" { V3Read::inCellDefine(true); }
"`default_decay_time"{ws}+[^\n\r]* { } // Verilog spec - delays only "`default_decay_time"{ws}+[^\n\r]* { } // Verilog spec - delays only
"`default_nettype"{ws}+[a-zA-Z0-9]* { yyerrorf("Unsupported: Verilog 2001 directive not implemented: %s",yytext); } // Verilog 2001
"`delay_mode_distributed" { } // Verilog spec - delays only "`delay_mode_distributed" { } // Verilog spec - delays only
"`delay_mode_path" { } // Verilog spec - delays only "`delay_mode_path" { } // Verilog spec - delays only
"`delay_mode_unit" { } // Verilog spec - delays only "`delay_mode_unit" { } // Verilog spec - delays only
@ -824,29 +821,32 @@ escid \\[^ \t\f\r\n]+
"`remove_netnames" { } // Verilog-XL compatibility "`remove_netnames" { } // Verilog-XL compatibility
"`resetall" { } "`resetall" { }
"`suppress_faults" { } // Verilog-XL compatibility "`suppress_faults" { } // Verilog-XL compatibility
"`systemc_ctor" { BEGIN SYSCCTOR; }
"`systemc_dtor" { BEGIN SYSCDTOR; }
"`systemc_header" { BEGIN SYSCHDR; }
"`systemc_imp_header" { BEGIN SYSCIMPH; }
"`systemc_implementation" { BEGIN SYSCIMP; }
"`systemc_interface" { BEGIN SYSCINT; }
"`timescale"{ws}+[^\n\r]* { } // Verilog spec - not supported "`timescale"{ws}+[^\n\r]* { } // Verilog spec - not supported
"`verilog" { BEGIN V3Read::lastVerilogState(); }
/* See also setLanguage below */
"`begin_keywords"[ \t]*\"1364-1995\" { yy_push_state(V95); V3Read::pushBeginKeywords(YY_START); } "`begin_keywords"[ \t]*\"1364-1995\" { yy_push_state(V95); V3Read::pushBeginKeywords(YY_START); }
"`begin_keywords"[ \t]*\"1364-2001\" { yy_push_state(V01); V3Read::pushBeginKeywords(YY_START); } "`begin_keywords"[ \t]*\"1364-2001\" { yy_push_state(V01); V3Read::pushBeginKeywords(YY_START); }
"`begin_keywords"[ \t]*\"1364-2001-noconfig\" { yy_push_state(V01); V3Read::pushBeginKeywords(YY_START); } "`begin_keywords"[ \t]*\"1364-2001-noconfig\" { yy_push_state(V01); V3Read::pushBeginKeywords(YY_START); }
"`begin_keywords"[ \t]*\"1364-2005\" { yy_push_state(V05); V3Read::pushBeginKeywords(YY_START); } "`begin_keywords"[ \t]*\"1364-2005\" { yy_push_state(V05); V3Read::pushBeginKeywords(YY_START); }
"`begin_keywords"[ \t]*\"1800-2005\" { yy_push_state(S05); V3Read::pushBeginKeywords(YY_START); } "`begin_keywords"[ \t]*\"1800-2005\" { yy_push_state(S05); V3Read::pushBeginKeywords(YY_START); }
"`end_keywords" { yy_pop_state(); if (!V3Read::popBeginKeywords()) yyerrorf("`end_keywords when not inside `begin_keywords block"); } "`end_keywords" { yy_pop_state(); if (!V3Read::popBeginKeywords()) yyerrorf("`end_keywords when not inside `begin_keywords block"); }
/* Verilator */
"`systemc_ctor" { BEGIN SYSCCTOR; }
"`systemc_dtor" { BEGIN SYSCDTOR; }
"`systemc_header" { BEGIN SYSCHDR; }
"`systemc_imp_header" { BEGIN SYSCIMPH; }
"`systemc_implementation" { BEGIN SYSCIMP; }
"`systemc_interface" { BEGIN SYSCINT; }
"`verilog" { BEGIN V3Read::lastVerilogState(); }
} }
<SYSCHDR>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCHDR; } <SYSCHDR>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { FL; NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCHDR; }
<SYSCINT>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCINT; } <SYSCINT>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { FL; NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCINT; }
<SYSCIMP>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCIMP; } <SYSCIMP>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { FL; NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCIMP; }
<SYSCIMPH>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCIMPH; } <SYSCIMPH>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { FL; NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCIMPH; }
<SYSCCTOR>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCCTOR; } <SYSCCTOR>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { FL; NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCCTOR; }
<SYSCDTOR>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCDTOR; } <SYSCDTOR>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { FL; NEXTLINE(); yylval.strp = V3Read::newString(yytext); return yaSCDTOR; }
<IGNORE>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); } <IGNORE>[ \t]*[^` \t\n\r][^\n\r]*{crnl} { NEXTLINE(); }
/* Pick up text-type data */ /* Pick up text-type data */
@ -859,7 +859,7 @@ escid \\[^ \t\f\r\n]+
/* Default rules - leave last */ /* Default rules - leave last */
<V95,V01,V05,S05,PSL>{ <V95,V01,V05,S05,PSL>{
"`"[a-zA-Z_0-9]+ { yyerrorf("Define or directive not defined: %s",yytext); } "`"[a-zA-Z_0-9]+ { FL; yyerrorf("Define or directive not defined: %s",yytext); }
"//"[^\n]* { } /* throw away single line comments */ "//"[^\n]* { } /* throw away single line comments */
. { FL; return yytext[0]; } /* return single char ops. */ . { FL; return yytext[0]; } /* return single char ops. */
} }

36
src/verilog.y
View File

@ -134,23 +134,18 @@ class AstSenTree;
AstNode* nodep; AstNode* nodep;
AstAssignW* assignwp;
AstBegin* beginp;
AstCase* casep; AstCase* casep;
AstCaseItem* caseitemp; AstCaseItem* caseitemp;
AstCell* cellp;
AstConst* constp; AstConst* constp;
AstFunc* funcp; AstFunc* funcp;
AstModule* modulep; AstModule* modulep;
AstNodeVarRef* varnodep; AstNodeVarRef* varnodep;
AstParseRef* parserefp; AstParseRef* parserefp;
AstPin* pinp; AstPin* pinp;
AstPort* portp;
AstRange* rangep; AstRange* rangep;
AstNodeSenItem* senitemp; AstNodeSenItem* senitemp;
AstSenTree* sentreep; AstSenTree* sentreep;
AstVar* varp; AstVar* varp;
AstVarRef* varrefp;
} }
// When writing Bison patterns we use yTOKEN instead of "token", // When writing Bison patterns we use yTOKEN instead of "token",
@ -165,6 +160,7 @@ class AstSenTree;
// enum_identifier, interface_identifier, interface_instance_identifier, // enum_identifier, interface_identifier, interface_instance_identifier,
// package_identifier, type_identifier, variable_identifier, // package_identifier, type_identifier, variable_identifier,
%token<strp> yaID__ETC "IDENTIFIER" %token<strp> yaID__ETC "IDENTIFIER"
%token<strp> yaID__LEX "IDENTIFIER-in-lex"
// IEEE: integral_number // IEEE: integral_number
%token<nump> yaINTNUM "INTEGER NUMBER" %token<nump> yaINTNUM "INTEGER NUMBER"
@ -662,7 +658,7 @@ port_declNetE: // IEEE: part of port_declaration, optional net type
| net_type { } // net_type calls VARNET | net_type { } // net_type calls VARNET
; ;
portSig<portp>: portSig<nodep>:
id/*port*/ { $$ = new AstPort(CRELINE(),PINNUMINC(),*$1); } id/*port*/ { $$ = new AstPort(CRELINE(),PINNUMINC(),*$1); }
| idSVKwd { $$ = new AstPort(CRELINE(),PINNUMINC(),*$1); } | idSVKwd { $$ = new AstPort(CRELINE(),PINNUMINC(),*$1); }
; ;
@ -1300,7 +1296,7 @@ instnameList<nodep>:
| instnameList ',' instnameParen { $$ = $1->addNext($3); } | instnameList ',' instnameParen { $$ = $1->addNext($3); }
; ;
instnameParen<cellp>: instnameParen<nodep>:
id instRangeE '(' cellpinList ')' { $$ = new AstCell($3, *$1,V3Parse::s_instModule,$4, V3Parse::s_instParamp,$2); } id instRangeE '(' cellpinList ')' { $$ = new AstCell($3, *$1,V3Parse::s_instModule,$4, V3Parse::s_instParamp,$2); }
| id instRangeE { $$ = new AstCell(CRELINE(),*$1,V3Parse::s_instModule,NULL,V3Parse::s_instParamp,$2); } | id instRangeE { $$ = new AstCell(CRELINE(),*$1,V3Parse::s_instModule,NULL,V3Parse::s_instParamp,$2); }
//UNSUP instRangeE '(' cellpinList ')' { UNSUP } // UDP //UNSUP instRangeE '(' cellpinList ')' { UNSUP } // UDP
@ -2191,40 +2187,40 @@ gatePulldownList<nodep>:
| gatePulldownList ',' gatePulldown { $$ = $1->addNext($3); } | gatePulldownList ',' gatePulldown { $$ = $1->addNext($3); }
; ;
gateBuf<assignwp>: gateBuf<nodep>:
gateIdE instRangeE '(' idClassSel ',' expr ')' { $$ = new AstAssignW ($3,$4,$6); } gateIdE instRangeE '(' idClassSel ',' expr ')' { $$ = new AstAssignW ($3,$4,$6); }
; ;
gateBufif0<assignwp>: gateBufif0<nodep>:
gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, new AstConst($3,V3Number($3,"1'bz")), $6)); } gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, new AstConst($3,V3Number($3,"1'bz")), $6)); }
; ;
gateBufif1<assignwp>: gateBufif1<nodep>:
gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, $6, new AstConst($3,V3Number($3,"1'bz")))); } gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, $6, new AstConst($3,V3Number($3,"1'bz")))); }
; ;
gateNot<assignwp>: gateNot<nodep>:
gateIdE instRangeE '(' idClassSel ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); } gateIdE instRangeE '(' idClassSel ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); }
; ;
gateNotif0<assignwp>: gateNotif0<nodep>:
gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, new AstConst($3,V3Number($3,"1'bz")), new AstNot($3, $6))); } gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, new AstConst($3,V3Number($3,"1'bz")), new AstNot($3, $6))); }
; ;
gateNotif1<assignwp>: gateNotif1<nodep>:
gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, new AstNot($3,$6), new AstConst($3,V3Number($3,"1'bz")))); } gateIdE instRangeE '(' idClassSel ',' expr ',' expr ')' { $$ = new AstAssignW ($3,$4,new AstCond($3,$8, new AstNot($3,$6), new AstConst($3,V3Number($3,"1'bz")))); }
; ;
gateAnd<assignwp>: gateAnd<nodep>:
gateIdE instRangeE '(' idClassSel ',' gateAndPinList ')' { $$ = new AstAssignW ($3,$4,$6); } gateIdE instRangeE '(' idClassSel ',' gateAndPinList ')' { $$ = new AstAssignW ($3,$4,$6); }
; ;
gateNand<assignwp>: gateNand<nodep>:
gateIdE instRangeE '(' idClassSel ',' gateAndPinList ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); } gateIdE instRangeE '(' idClassSel ',' gateAndPinList ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); }
; ;
gateOr<assignwp>: gateOr<nodep>:
gateIdE instRangeE '(' idClassSel ',' gateOrPinList ')' { $$ = new AstAssignW ($3,$4,$6); } gateIdE instRangeE '(' idClassSel ',' gateOrPinList ')' { $$ = new AstAssignW ($3,$4,$6); }
; ;
gateNor<assignwp>: gateNor<nodep>:
gateIdE instRangeE '(' idClassSel ',' gateOrPinList ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); } gateIdE instRangeE '(' idClassSel ',' gateOrPinList ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); }
; ;
gateXor<assignwp>: gateXor<nodep>:
gateIdE instRangeE '(' idClassSel ',' gateXorPinList ')' { $$ = new AstAssignW ($3,$4,$6); } gateIdE instRangeE '(' idClassSel ',' gateXorPinList ')' { $$ = new AstAssignW ($3,$4,$6); }
; ;
gateXnor<assignwp>: gateXnor<nodep>:
gateIdE instRangeE '(' idClassSel ',' gateXorPinList ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); } gateIdE instRangeE '(' idClassSel ',' gateXorPinList ')' { $$ = new AstAssignW ($3,$4,new AstNot($5,$6)); }
; ;
gatePullup<nodep>: gatePullup<nodep>:
@ -2368,7 +2364,7 @@ idArrayed<nodep>: // IEEE: id + select
; ;
// VarRef without any dots or vectorizaion // VarRef without any dots or vectorizaion
varRefBase<varrefp>: varRefBase<nodep>:
id { $$ = new AstVarRef(CRELINE(),*$1,false);} id { $$ = new AstVarRef(CRELINE(),*$1,false);}
; ;