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Fix negative assignment pattern keys (#5580).
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@ -19,6 +19,7 @@ Verilator 5.031 devel
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* Fix VPI error instead of fatal for vpi_get_value() on large signals (#5571). [Todd Strader]
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* Fix VPI error instead of fatal for vpi_get_value() on large signals (#5571). [Todd Strader]
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* Fix --output-groups leftover files issue (#5574). [Todd Strader]
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* Fix --output-groups leftover files issue (#5574). [Todd Strader]
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* Fix slow unsized number parsing (#5577). [Geza Lore]
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* Fix slow unsized number parsing (#5577). [Geza Lore]
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* Fix negative assignment pattern keys (#5580). [Iztok Jeras]
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Verilator 5.030 2024-10-27
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Verilator 5.030 2024-10-27
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@ -4006,11 +4006,18 @@ patternKey<nodep>: // IEEE: merge structure_pattern_key, array_patt
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// // "foo"member (if structure)
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// // "foo"member (if structure)
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// // So for now we only allow a true constant number, or an
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// // So for now we only allow a true constant number, or an
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// // identifier which we treat as a structure member name
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// // identifier which we treat as a structure member name
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yaINTNUM { $$ = new AstConst{$<fl>1, *$1}; }
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yaINTNUM
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| yaFLOATNUM { $$ = new AstConst{$<fl>1, AstConst::RealDouble{}, $1}; }
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{ $$ = new AstConst{$<fl>1, *$1}; }
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| id { $$ = new AstText{$<fl>1, *$1}; }
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| '-' yaINTNUM
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| strAsInt { $$ = $1; }
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{ V3Number neg{*$2}; neg.opNegate(*$2); $$ = new AstConst{$<fl>2, neg}; }
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| simple_typeNoRef { $$ = $1; }
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| yaFLOATNUM
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{ $$ = new AstConst{$<fl>1, AstConst::RealDouble{}, $1}; }
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| id
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{ $$ = new AstText{$<fl>1, *$1}; }
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| strAsInt
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{ $$ = $1; }
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| simple_typeNoRef
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{ $$ = $1; }
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// // expanded from simple_type ps_type_identifier (part of simple_type)
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// // expanded from simple_type ps_type_identifier (part of simple_type)
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// // expanded from simple_type ps_parameter_identifier (part of simple_type)
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// // expanded from simple_type ps_parameter_identifier (part of simple_type)
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| packageClassScopeE idType
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| packageClassScopeE idType
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@ -13,6 +13,8 @@ module t (/*AUTOARG*/);
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logic [31:0] larray_assign [0:3];
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logic [31:0] larray_assign [0:3];
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logic [31:0] larray_other [0:3];
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logic [31:0] larray_other [0:3];
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logic [31:0] array_neg [-1:1];
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initial begin
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initial begin
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array_assign[0] = 32'd1;
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array_assign[0] = 32'd1;
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array_assign[3:1] = '{32'd4, 32'd3, 32'd2};
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array_assign[3:1] = '{32'd4, 32'd3, 32'd2};
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@ -34,6 +36,11 @@ module t (/*AUTOARG*/);
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if (larray_other[2] != 3) $stop;
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if (larray_other[2] != 3) $stop;
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if (larray_other[3] != 2) $stop;
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if (larray_other[3] != 2) $stop;
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array_neg = '{-1: 5, 1: 7, default: 'd6};
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if (array_neg[-1] != 5) $stop;
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if (array_neg[0] != 6) $stop;
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if (array_neg[1] != 7) $stop;
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$write("*-* All Finished *-*\n");
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$write("*-* All Finished *-*\n");
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$finish;
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$finish;
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end
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end
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